IPC-D-279 EN.pdf - 第30页

As with printed boards with supporting planes, one or more supporting metallic or non-metallic planes can serve as a stif fener, heatsink, and/or CTE constraint in constraining core printed boards. The results of ‘ ‘acce…

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Table 4−1 Advantages and Disadvantages of Various Types of Substrates
TYPE MAJOR ADVANTAGES MAJOR DISADVANTAGES COMMENTS
ORGANIC BASE SUBSTRATE
Epoxy fiberglass Substrate size, weight; reworkable;
dielectric properties; conventional
board processing, availability,
cost/performance value.
Thermal conductivity x, y, and z axis CTE a concern for
high density applications.
Polyimide fiberglass Same as epoxy fiberglass plus
high temperature z axis CTE;
substrate size; weight; reworkable,
dielectric properties.
Thermal conductivity; moisture
absorption.
Same as epoxy fiberglass; x, y,
and z axis CTE a concern for high
density applications.
Epoxy aramid fiber Same as epoxy fiberglass; x-y axis
CTE; substrate size; lightest
weight; reworkable; dieletric
properties.
Thermal conductivity; resin
microcracking; z axis CTE; water
absorption; cost; resin adherence.
Volume fraction of fiber can be
controlled to tailor x-y CTE. Resin
selection critical to reducing resin
microcracks.
Polyimide aramid fiber Same as epoxy aramid fiber; z
axis CTE; substrate size; weight;
reworkable; dielecric properties.
Thermal conductivity; resin
microcracking; water absorption;
cost; resin adherence.
Same as epoxy aramid fiber.
Polyimide quartz (fused silica) Same as polyimide aramid fiber; x,
y, z axis CTE; substrate size;
weight; reworkable; dielectric
properties.
Thermal conductivity; drilling;
availability; cost; low resin content
required.
Volume fraction of fiber can be
controlled to tailor x-y CTE. Drill
wearout higher than with
fiberglass.
Fiberglass/Teflon laminates Dielectric constant; high
temperature stability; thermal
conductivity; x and y axis CTE.
Same as epoxy fiberglass; low
temperature stability; thermal
conductivity; x and y axis CTE;
difficult processing.
Suitable for high speed logic and
high frequency applications. Same
as epoxy fiberglass.
Flexible dielectric Lightweight; minimal concert to
CTE; configuration flexibility.
Size Rigid-flexible boards offer tradeoff
compromises.
Thermoplastic 3-D configurations; low
high-volume cost.
High injection molding setup costs;
additive processing.
Very limited applications.
Bismaleimide/triazine glass Improved dielectric properties;
multiple thermal shock; minimum
cost penalty for upgrade.
Thermal conductivity; x, y, and z
axis CTE.
Applicable to MCM-L technology.
Composite CEM-1 and CEM-3 Punchable at room temperature;
cost; stiff enough for SMD.
x and y axis CTE; thermal
conductivity.
Substrate of choice for consumer
products with SMDs.
Paper-based phenolic Punchable with heat; lowest cost. Single-sided only; stiffness;
availability; x and y axis CTE.
Majority of world market is
paper-based.
NONORGANIC BASE
Alumina (ceramic) CTE; thermal conductivity;
conventional thick film or thin film
processing; integrated resistors.
Substrate size; rework limitations;
weight; constant; brittle; dielectric
constant.
Most widely used for hybrid circuit
technology.
SUPPORTING PLANE
Printed board bonded to plane
support (metal or nonmetal)
Substrate size; reworkability;
dielectric properties; conventional
board processing x-y axis CTE;
stiffness; shielding; cooling.
Weight The thickness/CTE of the metal
core can be varied along with the
board thickness, to tailor the
overall CTE of the composite.
Sequential processed board with
supporting plane core
Same as board bonded to
supporting plane.
Weight Same as board bonded to
supporting plane.
Discrete wire High speed interconnections; good
thermal and electrical features.
Licensed process; requires special
equipment; cost; availability.
Same as board bonded to low
expansion metal support plane.
CONSTRAINING CORE
Printed board bonded with
constraining metal core
x and y axis CTE; uses FR-4 or
polyimide/glass materials.
Weight; internal layer registration;
delamination; via hole cracking, z
axis CTE.
Can be used as power/ground
planes.
Printed board bonded to low
expansion graphite fiber core
Same as board bonded to low
expansion metal cores; stiffness,
thermal conductivity; low weight.
Cost; microcracking; z axis CTE. The thickness of the graphite and
board can be varied to tailor the
overall CTE of the composite.
Compliant layer structures Substrate size; dielectric
properties; x-y axis CTE.
z axis CTE; thermal conductivity. Compliant layer absorbs difference
in CTE between ceramic package
and substrate.
IPC-D-279 July 1996
18
As with printed boards with supporting planes, one or more
supporting metallic or non-metallic planes can serve as a
stiffener, heatsink, and/or CTE constraint in constraining
core printed boards.
The results of ‘accelerated’ life tests which incorporate
temperatures which approach or exceed the T
g
of the sub-
strate should not be extrapolated to predict service life;
these tests may be used to discriminate between alterna-
tives.
4.5.1 Printed Board Stiffness and Damping Con-
strained core systems with skins of high modulus material
form boards which in comparison with standard base mate-
rials are stiffer and have higher damping frequencies. These
characteristics may be beneficial, depending upon the envi-
ronmental vibration and noise spectrum.
4.6 Flexible Printed Board with Metal Support Plane
Another arrangement for a printed board with leadless
components involves conventional fine-line polyimide flex-
ible printed wiring. These assemblies can be constructed in
multilayer form while retaining the low-modulus feature
that reduces residual strain at the solder joints. Further-
more, lasers can drill very fine holes in the thin, printed
wiring laminate. These holes can be plated-through or
filled with solid copper as required.
To retain inherent flexibility while dissipating heat from the
solder joint, cutouts in the flexible circuit accommodate
pillars from the metal heatsink support plane. Although this
appears to be heavy and cumbersome, if the heatsink base-
plates are made from thin sheets of aluminum, the result-
ing density of the combined circuit/heatsink assembly
might actually be less than other constructions.
4.7 Discrete Wire Structures with Metal Support
Plane
Discrete wire printed boards have been developed
specifically for use with surface mounted components.
These structures are usually built with a low-expansion
metal support plane that also offers good heat dissipation.
The interconnections are made by discrete 0.06 mm diam-
eter insulated copper wires precisely placed on a 0.03 mm
grid by numerically-controlled machines. This geometry
results in a low-profile interconnection pattern with excel-
lent high-speed electrical characteristics and a density nor-
mally associated with thick film technology.
The wiring is encapsulated in a compliant resin to absorb
local stresses and dampen vibration. Electrical access to the
conductors is by 0.25 mm diameter copper vias. The small
via size can be accommodated in the component attach-
ment land, thus eliminating the need for fanout patterns
when using components with terminals on centers as close
as 0.6 mm, and allowing very-high packaging densities.
The high level of water absorbed into polyimide tape auto-
mated bonding (TAB) substrate materials during exposure
to high ambient moisture levels has been observed to result
in conductor corrosion and delamination.
4.8 Outgassing of Polymer Substrates See also the dis-
cussion of solder mask and coatings in Appendix N, and
section 6. The printed board may contribute emissions of
cleaning solvent, polyglycols, and lighter fractions of flux
vehicles in addition to the emission from the solder mask
and conformal coating of the printed board and of the com-
ponent encapsulation materials.
4.9 Assembly Process Effects on Polymer Substrates
See also the discussion of rework and repair in section 7.6
and Appendix E.
In addition, fluxes for wave soldering and for water soluble
solder pastes can contain high boiling point hydrophilic or
hygroscopic solvents such as the polyglycols. These sol-
vents can penetrate the resin-glass fiber interface and con-
tribute to conductive anodic filament (CAF) formation. See
Appendix C for DfR information. See also IPC-TR-476.
4.10 Printed Board Solderability The land patterns in
IPC-SM-782, particularly for those intended for fine pitch
and extra fine pitch components, clearly demonstrate the
very small areas available for affecting the solder joint in
SM technology. A solderability defect with an area of 125
µm by 250 µm which might be discounted on a through
hole board may constitute the single land which is non-
solderable on a SM board and render that SM PWA non-
functional; worse, the component lead may contact the land
and mechanically affect an electrical contact which
becomes intermittent in service and the product is a NTF or
No Trouble Found at the repair center.
Although solder dipping and hot air solder leveling
(HASL) are said to constitute ‘proof’ that the land is sol-
derable, these processes do not characterize solderability of
the land at the critical time which is just before the solder
paste is applied and the components are placed. Printed
board land solderability is degraded by oxides or chlorides
of tin and lead oxides or chlorides of tin-lead phases;
oxides of tin-copper intermetallic compounds; and organic
films such as residues from fluxing oils, finger prints or
solder mask. These oxides, chlorides and organic films can
form after the HASL process. See also IPC-PE-740 and
IPC-S-816. Quantification of the solderability of the SM
printed board is difficult but is addressed in ANSI/J-STD-
003; an earlier specification is IPC-S-805.
4.11 Design for Reliability of Plated-Through-Hole Vias
(PTVs)
The material in Appendix B gives a detailed treat-
ment of DfR for PTVs.
5.0 GENERAL COMPONENT SELECTION CONSIDER-
ATIONS
1. During circuit design and verification, primary
impact on manufacturing and reliability lies in the
July 1996 IPC-D-279
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selection of components.
2. Commonly used components are available with
information detail that simplifies layout, assembly,
test, and repair. The data includes termination mate-
rial and finish, termination configuration, land pat-
tern, package construction, etc.
3. Some components are very easy to assemble, test,
and repair; others are not. The availability of a com-
ponent, its performance data, its degree of testability,
its reliability and its compatibility with manufactur-
ing and assembly process and equipment influences
component selection.
It is important that the electronic circuit designer and the
designer of the SM PWA understand that the selection and
application of components cannot be isolated from selec-
tion and process flow design of the assembly processes,
including inspection, test, rework, repair, and service. The
surface mount reflow and wave solder processes subject the
component to process stresses at levels not achieved in
through-hole solder processes. These stresses and espe-
cially the components’ response to reflow or wave tempera-
tures in excess of 220°C are not normally considered in
through-hole component design. Shock and vibration
stresses applied to the SM PWA during depaneling can
greatly exceed the stresses anticipated in service or trans-
portation. Application-specific ICs (ASIC) and other IC
components require thorough testing and test coverage
prior to assembly; if the SM PWA is defective at board test,
sufficient test pads must be present for effective fault loca-
tion and component replacement to be made.
5.1 Component Selection Strategy The best strategy is
to use parts that meet (as a minimum) JEDEC/EIA foot-
prints and which have been qualified for the process flow
including rework/repair. The characterization/qualification
process should be conducted with the components mounted
on coupons to simulate the process and thermomechanical
stresses. These requirements apply to assembly subcontrac-
tors, as well as in-house assembly operations. See also
IPC-R-700.
Component suppliers may be able to provide data on the
reliability of components upon exposure to various acceler-
ated stress conditions after exposure to various simulated
reflow processes.
5.2 Package Leadframe and Local Materials Lead-
frame and lead materials with low CTEs, e.g. Alloy42,
Kovar, etc., should be avoided for plastic surface mount
components (PSMCs). Such materials lower the composite
CTE of components creating large CTE-mismatches with
FR-4 or similar printed board materials. Solderability prob-
lems have also been encountered with these lead materials.
See also Appendix A.
5.3 Package Lead Configuration Selection
1. Surface mount devices (SMDs) are functionally not
different from their conventional through-hole coun-
terparts. What is different in surface mounting is the
packaging of devices. SMDs provide greater packing
density because of their small size. SMDs are avail-
able in numerous package types and lead configura-
tions (see IPC-D-275 and IPC-SM-782). For further
details on specific components, reference Appendix
F.
2. In the selection of SMDs, consider such differentiat-
ing factors as termination configuration, availability,
and real estate consideration. For complex function
SMDs, testability is an additional factor; see Section
8.2 and Appendix J on DfT.
5.3.1 Gull Wing Components The gull-wing leads of
small outline integrated circuit (SOIC) packages are easier
to inspect than the J-leads on plastic leaded chip carriers
(PLCC). Gull-wing leads can be soldered using various
processes, are more uniform (simplifying routing) and
more accessible for testing purposes (but must not be
directly contacted with probe pins to avoid damage at the
lead-package interface). The disadvantage is that gull-wing
leads protrude from the package (occupying valuable board
space), and particularly on packages without corner
bumpers, are susceptible to damage during shipping and
handling.
5.3.2 J-Lead Components J-leads are more space effi-
cient than gull-wing leads and can also be soldered using
most reflow processes. J-leads are sturdier and more resis-
tant to shipping and handling damage. The compactness of
J-leaded components, however, can complicate routing and
reduce test access. However, some J-leads have higher lead
stiffness increasing the fatigue damage to solder joints.
5.3.3 Pin Grid Arrays Pin-grid arrays (PGAs) require
more real estate and board layers, especially if a fine line
fabrication is not being used. Some PGAs have hundreds of
pins that occupy large sections of every routing layer with
complex break out patterns.
5.3.4 Fine Pitch Components The potential complica-
tions of the fine pitch SMD are balanced by its smaller
footprint. Fine pitch SMDs are more difficult to rework,
service, and test; they are also more difficult for assembly
equipment to handle than standard SMDs. Because fine
pitch terminations and tolerances are much smaller, they
may require a robotic arm as opposed to pick and place
equipment for accurate placement. In many situations,
there are no packaging alternatives because some devices
are so complex that only one or two package types are
available.
IPC-D-279 July 1996
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