IPC-D-279 EN.pdf - 第53页

where F ∑ (N) = system cumulative failure probability after N total cycles, n i = number of components of type i, N i,j = actual number of cycles applied to component i at a speciﬁc cyclic load level j, N f,i,j (x%) = fa…

Experimentally, β can be found to be quite variable with

more severely accelerated reliability tests resulting in

tighter failure distributions and thus giving larger values

for β. Values of β in the range of 1.8 to 9.0 have been

observed.

There is some, unfortunately as yet inadequate, evidence

that for lower failure probabilities a three-parameter (3P)

Weibull distribution, postulating a failure-free period prior

to ﬁrst failure [Refs. A-9: 32,37], may be applicable. From

physics-of-failure and damage mechanism considerations, a

failure threshold as provided by a 3P-Weibull distribution

makes sense, since the fatigue damage in the solder joints

has to accumulate to crack initiation and complete crack

propagation. While the 2P-Weibull distribution may be

overly conservative for designs to very small acceptable

failure probabilities (x < ~0.1%), a too liberal choice of the

failure-free period is deﬁnitely non-conservative. This area

requires more work.

Also, when designing to low failure probabilities, the vari-

ability in the quality of the solder joints may no longer be

negligible; also solder joints with latent defects that made

it into the ﬁeld will have in impact on the actual failure

experience of a product in the ﬁeld.

A-3.9 Multiple Cyclic Load Histories

The loading histories over the life of a product frequently

include many different use environments and loading con-

ditions [Refs. A-9: 38,39]. Multiple cyclic load histories

(e.g., ‘‘Cold’’ temperature fatigue cycles combined with

higher temperature creep/fatigue cycles (see Table A-1)

combined with vibration and local expansion mismatches)

all make their contributions to the cumulative fatigue dam-

age in solder joints. Under the assumption that these dam-

age contributions are linearly cumulative—this assumption

underlies Eqs. A-1 and A-2 as well—and that the simulta-

neous occurrence or the sequencing order of these load

histories makes no signiﬁcant difference, the Palmgren-

Miner’s rule [Ref. A-9: 40] can be applied.

Frequently the initial reliability objective is stated as an

allowable net cumulative damage ratio (CDR). The CDR is

calculated as the sum of the ratios of the number of occur-

ring load cycles to the fatigue life at each loading condition

and is

CDR =

j=1

[Eq. A-9]

where

= actual applied number of cycles at a speciﬁc cyclic

load level j,

= fatigue life at the same speciﬁc cyclic load level j

alone.

The fatigue life is frequently not completely speciﬁed and

is normally taken to be the mean cyclic fatigue life. Equa-

tion A-8 can be used with the allowable CDR signiﬁcantly

less than unity to provide margins of safety, or more accu-

rately, margins of ignorance.

Because the failure of solder joints results from wearout

due to fatigue, the failure rate is continuously increasing.

This is in stark contrast to the reliability design philosophy

of MIL-HDBK-217 [Ref. A-9: 41] which presumes a con-

stant failure rate. These increasing failure rates are properly

represented by an appropriate statistical failure distribution.

Thus, to assure low failure risks, the fatigue life should be

speciﬁed at the acceptable cumulative failure probability at

the end of the design life as per Eq. A-3. Thus, Eq. A-9 is

more appropriately written as

CDR(x%)=

j=1

(x%)

= 1

[Eq. A-10]

where

CDR(x%)= cumulative damage ratio resulting in a cumu-

lative failure probability of x%,

(x%) = fatigue life at the cyclic load level j and a fail-

ure probability of x% .

This approach works very well for the design of the solder

attachment for a single component. However, it is inad-

equate for a reliability analysis of the whole assembly.

See section 3.1.13 for a discussion of non-linear or over-

load effects.

A-3.10 System Reliability Evaluation

Equations A-1 through A-10 address the reliability of the

SM solder attachment of individual components. Systems

consist of a variety of different components most of which

occur in multiple quantities. Further, as shown in Table

A-1, many use environments cannot and should not be rep-

resented by a single thermal cyclic environment, and accu-

mulating fatigue damage from other sources, such as cyclic

thermal environments as described in Caveats 2 to 4 as

well as vibration, needs to be included also.

For a multiplicity of components, i, in the system, the

effect of the various components on the system reliability

can be determined from

∑

(N)=1 − exp

{

1n(1 − 0.01x)

i=1

[

j=1

f,i,j

(x%)

]

}

[Eq. A-11]

July 1996 IPC-D-279

where

∑

(N) = system cumulative failure probability after N

total cycles,

= number of components of type i,

i,j

= actual number of cycles applied to component

i at a speciﬁc cyclic load level j,

f,i,j

(x%)= fatigue life of solder attachment of component

i at load level j at x% failure probability,

= Weibull slope for SM solder attachment of

component i.

A-4.0 DfR-PROCESS

Appropriate DfR-measures to improve reliability can take

one of two forms, which are best employed in combination

for improved reliability margins. These measures are:

1) CTE-tailoring to reduce the global expansion mis-

match;

2) Increasing attachment compliancy, e.g., by

increasing the solder joint height, to accommodate

the global expansion mismatch;

3) Underﬁlling the gap between the component and

substrate;

Further, a DfR procedure aiming at high-reliability should

also include

4) Choosing base materials that have not too large a

local CTE-mismatch with solder, or

5) In case item (4) cannot be done, reduce the con-

tinuous wetted length to reduce interfacial

stresses.

CTE-tailoring involves choosing the materials or material

combinations of the MLB and/or the components to

achieve an optimum ∆CTE. An optimum ∆CTE for active

components dissipating power is ~1-3 ppm/°C (depending

on the power dissipated) with the MLB having the larger

CTE, and 0 ppm/°C for passive components. Of course,

since an assembly has a multitude of components, full

CTE-optimization cannot be achieved for all

components—it needs to be for the components with the

largest threat to reliability. For military applications with

the requirement of hermetic—and thus ceramic—

components, CTE-tailoring has meant the CTE-

constraining of the MLBs with such materials as Kevlar

and graphite ﬁbers, or copper-Invar-copper and copper-

molybdenum-copper planes. Such solutions are too expen-

sive for most commercial applications for which glass-

epoxy or glass-polyimide are the materials of choice for the

MLBs. Thus, CTE-tailoring has to take the form of avoid-

ing larger size components that are either ceramic (CGAs,

MCMs), plastic with Alloy 42 leadframes (TSOPs, SOTs ),

or plastic with rigid bonded silicon die (PBGAs).

Increasing attachment compliancy for leadless solder

attachments means increasing the solder joint height (C4,

C5, shimming, gluing [Refs. A-9: 42,43], 10Sn/90Pb balls,

10Sn/90Pb columns) or switching to a leaded attachment

technology. For leaded attachments, increasing lead compli-

ancy can mean changing component suppliers to those hav-

ing lead geometries promoting higher lead compliancy or

switching to ﬁne-pitch technology.

The DfR-process needs to emphasize a physics-of-failure

perspective without neglecting the statistical distribution of

failures. The process might involve the following steps:

A. Identify Reliability Requirements—expected

design life and acceptable cumulative failure

probability at the end of this design life;

B. Identify Loading Conditions—use environments

(e.g., IPC-SM-785) and thermal gradients due to

power dissipation, which may vary and produce

large numbers of mini-cycles (Energy Star);

C Identify/Select Assembly Architecture—part and

substrate selections, material properties (e.g.,

CTE), and attachment geometry;

D. Assess Reliability—determine reliability potential

of the designed assembly and compare to the reli-

ability requirements using the approach shown

here, a ‘Figure of Merit’-approach [Ref. A-9: 44],

or some other suitable technique; this process may

be iterative;

E. Balance Performance, Cost and Reliability

Requirements.

A-5.0 CRITICAL FACTORS FOR EMERGING ADVANCED

TECHNOLOGIES

The lessons learned over the past 15 years with surface

mount technology (SMT) and ﬁne-pitch attachments

should be heeded and applied. However, some of the

emerging advanced technologies fall outside the previous

experience with SMT attachments. It is therefore important

that appropriate design validation and qualiﬁcation tests be

carried out to extend and, if necessary, alter and augment,

the existing understanding.

Following are short descriptions of some new technologies

where DfR, particularly for the solder attachments, is of

prime concern.

A-5.1 Flip Chip on Laminate

Here the biggest reliability concern is the large expansion

mismatch between the chip silicon and the polymeric sub-

strate. This either means relatively small chips or the use of

organic underﬁll materials which relieve the solder joints

from most of the thermal expansion mismatch loads. The

underﬁll material does however make repairs difficult if not

impossible. Detailed information about this technology has

been assembled in ANSI/J-STD-012, Implementation of

Flip Chip and Chip Scale Technology.

IPC-D-279 July 1996

A-5.2 Area Arrays (BGA, CGA)

Grid array components (GACs) come in a variety of styles

and materials. The major variations are BGAs, available

with plastic bodies as PBGAs or ceramic bodies as

CBGAs, and solder attached with either the C5-process or

with solder joints containing 10Sn/90Pb solder balls; and

CGAs with 10Sn/90Pb solder columns.

The long-term reliability of the solder attachments to FR-4

printed boards is a big concern with GACs. The global

thermal expansion mismatch between the GACs and the

printed board can be quite large as the result of the combi-

nation of large GAC sizes, large differences between the

thermal expansion coefficients of the GACs and the printed

board (∆CTE), and the power dissipation within the GACs.

Further, depending on the die attach and the GA material,

a large localized global thermal expansion mismatch under-

neath the die and a signiﬁcant local thermal expansion mis-

match between the solder itself and the GA surface can

increase the threat to reliability. In addition, the implemen-

tation of the Government-mandated ‘‘Energy Star’’ pro-

gram, the number of thermal cycles could be a multiple of

the once-a-day diurnal/on-off cycles.

The solder attachments of GACs vary depending on the

loading conditions to which the solder joints are subjected

to and the reliability requirements for the product. As men-

tioned earlier, BGAs are attached with either the

C5-process or with 10Sn/90Pb solder balls. The

C5-process, similar to the C4- or ﬂip-chip-process, results

in solder joints heights that are less controlled and lower

{h~400 to 640 µm}, while the 10Sn/90Pb solder balls typi-

cally with diameters of 760 to 890 µm result in uniform

solder joint heights of the same dimension since the 10Sn/

90Pb solder has a liquidus temperature signiﬁcantly above

the near-eutectic Sn/Pb solders and does not melt during a

typical reﬂow process. The solder columns, which cur-

rently are only used for ceramic GACs, are 10Sn/90Pb col-

umns with lengths of 1.25 to 2.30 mm that are either cast

onto the CGA or are wires soldered to both the CGA and

the substrate with near-eutectic Sn/Pb solder. The ratios of

fatigue lives, all parameters other than the solder joint

height being equal, are CBGA(0.40 mm): CBGA(0.75

mm): CGA(2.30 mm) = 1: 4: 45. The height of the solder

columns is limited by the requirement that the column

height-to-diameter aspect ratio does not produce slender

columns thus changing the loading conditions; cast col-

umns can accommodate larger aspect ratios.

It is also of importance for PBGAs, how the silicon chips

are attached to the BGA body. For ‘cavity-up’ components,

only a thin plastic layer separates the solder joints from the

die attach. As a consequence, the CTE underneath a rigid

die attach can be as low as 6 to 8 ppm/°C (very similar to

ceramic) locally raising the CTE-mismatch between the

PBGA and the FR-4 printed board from ∼2 to 10 ppm/°C.

Thus, the die size can only be ∼

⁄

the size of the BGA to

not negatively affect the reliability. Typically, die sizes are

signiﬁcantly larger than that, with the result that the solder

joints at the comers of the die fail before the outermost

BGA corner joints. The larger the die, the worse the solder

attachment reliability [Refs. A-9: 45,46]. Thus, the trend

towards perimeter-PBGAs, where solder joints exist only

on the package perimeter—with the possible exception of

some thermal solder balls and vias in the package center—

for routing reasons, is beneﬁcial for reliability [Ref. A-9:

47].

Further, the solder joint fractures are typically near the

interface between the BGA and the barrel-shaped solder

joints; this is a consequence of the contribution to the sol-

der joint loading of the local expansion mismatch between

the solder and the die-constraint BGA body [Ref. A-9: 45].

Substantial increases in fatigue life have reported with a

soft die attach [Ref. A-9: 48].

The geometry of the solder joints as well as the solder land

metallization have signiﬁcant inﬂuence on the reliability.

The solder masks can have a negative inﬂuence if they are

used for solder mask-deﬁned (SMD) lands with the solder

mask on the metallization lands affecting the solder joint

geometries. Stress concentrations created by the SMD-

solder joint geometries can be the origin of solder joint

failures and reduced reliability. For equal solder joint

height, increases in fatigue life by factors of about 1.25 to

3 can be anticipated with the use of non-solder mask-

deﬁned (NSMD) vs. SMD lands with the larger improve-

ments for solder joints with the more severe loading con-

ditions [Refs. A-9: 46, 48-51].

For PBGAs the additional reliability issue of via and con-

ductor failures has surfaced [Ref. A-9: 52]. The former

issue is addressed in Section A-4 and the latter can be rem-

edied by wider conductors and/or better copper foil [Ref.

A-9: 53].

Detailed information about this technology has been

assembled in ANSI/J-STD-013, Implementation of Ball

Grid Array and Other High Density Technology.

A-5.3 Thin Packages (TSOP)

The biggest reliability issue regarding TSOPs (thin small

outline packages) stems from the choice of Alloy 42 for the

leadframe material by some component manufacturers

[Refs. A-9: 27-31]. This material choice has the following

consequences with regard to the solder attachment reliabil-

ity:

(1) Increases global CTE-mismatch, because compo-

nent CTE is reduced to about the CTE of ceramic;

(2) Increases lead stiffness due to higher modulus of

elasticity reducing the effectiveness of the leads to

July 1996 IPC-D-279