IPC-D-279 EN.pdf - 第96页

boron trioxide, B 2 O 3 into the silicone dioxide layer , form- ing a boro-phospho-silicate glass (BPSG). Corrosion and opens occur on IC bond pads where the MC is delaminated, particularly in the corners of the chips in…

which the bond wires are connected to complete the circuit

from the IC bond pads).

The adhesion of the MC to the leadframe can be enhanced

by topical application of coupling agents or adhesion pro-

moters such as hexamethyldisilazane. If the strength of the

MC is insufficient, this degradation process progresses to

internal cracks in the MC, generally starting at sharp edges

and corners of the various elements in the package. If the

strength of the MC is inadequate, the cracks can progress

in the worst case to emerge on the surface of the package.

In milder cases, the cracks are internal and may terminate

on the lead ﬁngers. ANSI/IPC-SM-786 illustrates these

progressive stages. Because stress concentration is known

to be very strongly dependent upon the radius at the edges

of the die attach paddle, a suggested crack reduction tech-

nique is to increase the radius at these edges.

Another result of moisture absorption by the plastic is an

apparent decrease in the glass transition temperature (Tg)

of the MC. This change in Tg means that the moist plastic

expands and contracts more with changes in temperature

due to soldering processes than when the package was ini-

tially manufactured. Because the CTE of the MC is much

higher than the CTE of the chip, substrate or leadframe, the

MC expands and contracts with respect to these other ele-

ments, introducing additional stress at the interface. This

stress, in the case of ICs, can result in bond pad cratering

and is additional to the stress caused by the initial IC pack-

age curing process. Moist PSMCs exposed to temperature

cycling demonstrate a rapid progressive delamination and

product failure; dry PSMCs exposed to the same T/C con-

ditions show very slow progressive delamination. The con-

clusion is that vulnerable PSMCs can be robust to delami-

nation under T/C if kept dry.

F-6.1 Shorts and Resistive Shorts in PSMCs

In common with through hole (TH) components, PSMCs

suffer from metallic dendrites between the lead ﬁngers and

between leads. Dendrites are very thin, fragile metal

‘‘branches’’ which can be destroyed by casual contact or by

currents on the order of several hundred microamperes.

Dendrites form on surfaces and in cavities when the fol-

lowing conditions are present: continuous liquid water film

thicker than several molecules; hydrolyzable, ionizable

contaminant, particularly halides and acids, typically from

solder ﬂux but may also be extracted from the MC by the

diffusing moisture; metallic conductors, particularly silver,

copper, lead and tin (where halides are present, gold will

also dendrite); electrical DC bias at low current levels

between the conductors. See also IPC-TR-476A.

Liquid water ﬁlms occur in the package (or on the printed

board surface) when: the ambient humidity (relative

humidity) is high; the exposure duration is sufficient to

saturate the package (weeks to months at 25-35°C); there

is delamination, cracking or voiding in the package due to

initial manufacturing conditions or subsequent assembly

operations; there is power dissipated in the package insuf-

ﬁcient to keep the water in the vapor state.

Where the ambient temperature is suddenly reduced, we

would expect that internal moisture vapor will condense at

the interfacial voids. When cold parts are exposed to a

humid environment, we expect superﬁcial condensation.

Dendrites have been observed to be a result of: polyimide

ﬁlm delamination from the MC; voids in the MC due to

improper material handling or due to improper process

parameters during the molding process; cracks between

lead ﬁngers due to mechanical stresses applied during IC

manufacturing processes such as trim/form and thermal

shock stresses applied during IC manufacturing processes

such as solder dip; cracks between lead ﬁngers due to

printed board assembly processes such as TH insertion and

SM pick-and-place; delamination along lead ﬁngers and

leads which extend to the external surface of the package.

Cratering in silicone or GaAs ICs shows up under bonding

pads as cracks due to stresses introduced by the wire bond-

ing process. Cracks can grow during thermal shocks and

temperature cycling, allow metals such as aluminum to

move from the pad to the underlying semiconductor mate-

rial, and are manifested as a resistive short from the bond-

pad to or through the underlying junction.

F-6.2 Opens and Intermittent Opens in PSMCs

Opens have been traced to wirebreaks where the MC is

cracked, whether the crack originates from the chip, die

attach paddle, or lead ﬁnger.

Predictions by ﬁnite element analysis and data from pack-

aging stress test chips indicate the highest molding and

thermo-mechanical stresses will occur at the corners of ICs

and substrates.

Opens in metal conductors have been traced to stressed

metal patterns (thin ﬁlm cracking or TFC) in the corner of

IC chips. Experiments with planarized passivation/metal

patterns show metal damage when delamination is NOT

seen. Experiments with non-planarized patterns show metal

damage when delamination IS seen. Planarization of the

passivation/metal patterns was introduced in ICs to mini-

mize stresses transmitted to the patterns by the initial mold-

ing process. Minimized stresses are also the focus of the

‘‘low stress’’ holding compound formulations.

Corrosion and open metal conductors occur on IC chip

surfaces when the passivation is stressed and ruptured and

the package experiences the conditions described under

‘‘dendrites.’’ Where the passivation structure includes a

phosphorous pentoxide, P

, rich silicon oxide layer, a

liquid water ﬁlm can react with the P

, creating phos-

phoric acid, an excellent dissolver of the aluminum metal

conductors. This effect has been mitigated by incorporating

IPC-D-279 July 1996

boron trioxide, B

into the silicone dioxide layer, form-

ing a boro-phospho-silicate glass (BPSG).

Corrosion and opens occur on IC bond pads where the MC

is delaminated, particularly in the corners of the chips in

PSMC. Corrosion-related opens occur on any bondpads in

TH packages where delamination, cracking or MC voiding

has occurred, particularly on bonding pads associated with

centrally located lead ﬁngers.

Intermittent opens have been observed in PSM, as well as

in PTH packages where the delamination or cracking

occurs at the tip of the lead ﬁnger, causing wedge bond lift

or wire break. Delamination can also occur at the ball

bond/pad site. The separation of the wedge bond from the

lead ﬁnger, the ball bond from the bond pad, or the broken

wire ends from each other are microscopic. The separation

may be very sensitive to changing temperature and is often

intermittent. The product may fail during temperature

ramps, but may be functional at the endpoint temperatures.

F-6.3 PSMC Delamination and Thermal Resistance

(

Degradation)

Delamination and debonding of the die attach paddle/heat

spreader from the MC results in heat transfer by conduc-

tion through the gases in the voided region with an increase

in the θ

. There is no data on the effect of various degrees

of delamination/ debonding on the magnitude of θ

. Fur-

ther the increase in θ

appears to be: greater for thinner

packages; greater for packages of thermally conductive

MC; expected to ﬁrst appear in the corners of the die attach

paddle; more signiﬁcant for the package surface where heat

is conducted to the printed board or to a heatsink by such

means as thermally conductive adhesive; more signiﬁcant

for those components where heat dissipation or chip tem-

perature uniformity is critical and where variations in these

parameters affect performance or reliability.

F-7.0 RESISTORS

When resistors overheat or fail, the printed board under-

neath is often thermally degraded (with color changes in

the laminate or coatings as well as decreases in resistivity

of the laminate) or even charred, leading to catastrophic

failure and smoke. The pyrolytically generated gases may

or may not ignite. Printed board damage may be minimized

by placing a copper pad under the resistor; the additional

copper reduces the peak temperature experienced by the

printed board during overload of the resistor.

Above the critical value of resistance (where maximum

rated power is dissipated at maximum rated voltage), use

voltage derating rather than power derating.

Through-hole (TH) resistors are generally spaced apart

both because of their bulk and their need for PTH lands on

the substrate. Surface mount (SM) resistors can be

squeezed together because of their small size and because

of the small surface area required for lands on the sub-

strate. This opportunity for higher spatial density is rarely

refused by the designer; the result is higher power density

on the substrate.

TH and SM resistors dissipate their heat primarily through

their leads, which are both electrically and thermally con-

ductive, to the substrate conductors and thence to the air.

Because of the reduced solder land area on the SMT sub-

strate, the joint temperature will probably be higher in the

SMT version of a TH product.

TH resistors have a relatively large surface area available

to dissipate the heat to the air; in contrast, the active area

of the SM device is relatively small. Inexpensive TH resis-

tors are generally metal or carbon ﬁlm. A relatively large

volume or mass of material is available to dissipate both

steady state and pulsating peak heat. Inexpensive SM resis-

tors are generally thick ﬁlm in nature and printed on one

surface of a rectangular ceramic (generally alumina) body

of low thermal conductivity.

The SM active element has a very small thermal mass; the

active area of the SMT component can rapidly respond to

increased power input with increased active element tem-

peratures. Some resistor suppliers provide ratings on their

product performance as a function of duration of stress at

given temperatures and during assembly processing. SM

resistor power dissipation ratings should be approached

with caution; the data is generally obtained by the manu-

facturer in an undeﬁned environment possibly described by

a single resistor and an environmental chamber with mov-

ing air of unspeciﬁed velocity. Thermal ﬁnite element

analysis (FEA) and IR scans are recommended for veriﬁ-

cation of hot spot location and magnitude. The presence of

multiple heat dissipating elements in close proximity

reduces the power dissipation allowable for any given ele-

ment. No SM resistor manufacturer has provided allowable

active ﬁlm or component surface temperature data.

F-7.1 A Checklist for Power Resistors

• Locate resistors for favorable convection cooling.

• Provide mechanical clamping or thermoset heat trans-

fer material to improve conductive heat transfer from

power resistors to heat sink or chassis.

• Use short leads whenever possible so that traces and

leads provide sufficient ‘‘heat dissipation’’ capability-

unless physical distance from the printed board is

required to minimize heat rise in the printed board.

• Individual power resistors over 10 cm long mounted

with axis horizontal to minimize hotspots along length;

average temperature of vertical and horizontal

mounted resistors is about the same.

• Groups of power resistors mounted with axes vertical.

Stagger resistors horizontally so that they don’t direct

hot airﬂows to their vertical neighbor.

July 1996 IPC-D-279

• Design for a patch of copper foil beneath the body of

axial power > 2 Watts resistors to minimize charring of

the printed circuit board during fault conditions.

• At very high surface temperatures, radiation effects

can be signiﬁcant.

F-7.2 Trimmed Resistors The resistance value of rectan-

gular or cylindrical, thick-ﬁlm or thin-ﬁlm resistors is

adjusted by laser thermal ablation, sandblasting or abra-

sion. On cylindrical ﬁlm resistors, high speed spiral grind-

ing or abrasion is also used to adjust the resistance value.

On some rectangular thin metal-ﬁlm resistors, controlled

oxidation of the metal is used to adjust the resistance value.

The mechanical abrasion or thermal ablation resistance

value adjustment processes leave a narrow kerf. The kerf,

if bridged by conductive materials such as ﬂux, can be the

site of surface leakage. The kerf can also be the site of

voltage-induced breakdown, depending on the kerf geom-

etry. See also voltage stress and moist environment notes.

Note that the kerf on a TH Axial resistor which has been

trimmed to value is generally quite long compared to the

kerf on a rectangular SM device; hence the potential across

the kerf of the TH component is lower (less stress) than

that across the kerf of the SM component. In general, the

kerf is mechanically protected from the environment by a

plastic conformal coating. The kerf of any trimmed resistor

is best protected by a glass or inorganic coating which

covers the resistive and conductive areas; under conditions

of severe thermal or mechanical stress, even the inorganic

protective glaze can chip, crack or craze, leading to corro-

sion and failure of the resistive ﬁlm or termination.

F-7.3 Fixed Resistors Use metal oxide above 1 Watt or

wire-wound resistors above 2 Watts.

SM Metal Electrode Face bonded (MELFs) conﬁguration

components may require special ‘‘U−’’ shaped land pat-

terns to reduce rolling or may require adhesive to retain

position during reﬂow.

F-7.3.1 Metal Film Resistors Use for high stability, long

life, high frequency, reliability and accuracy.

Metal-ﬁlm resistors perform better in applications requiring

precision and stability compared to wire-wound resistors

according to warranty data.

Speciﬁc Cautions: Humidity or salt air can cause shunt

paths on surface of resistor and shorting between spirals.

Opens can be caused by mechanical damage. Higher noise

than wire-wound. Spiral cut: Opens may occasionally

occur due to too thin a resistance track due to non-uniform

resistance spiral. Operation at RF above 100 MHz may

produce inductive effects. Shorts may occasionally occur

due to protuberances on adjacent resistance spiral. Opera-

tion at > 400 MHz results in reduced effective resistance

due to dielectric effects. Critical matched resistors should

be purchased and installed as a set. Resistive ﬁlm can cor-

rode if encapsulant or conformal coating is breached; a

common point of entry for water or conductive contamina-

tion is the juncture of the terminal and overmoulding mate-

rial or conformal coating. Mechanical stresses affect this

type at temperatures < − 55°C.

Metal ﬁlms of nickel-chrome (NiCr) alloy (aluminum

doped) are susceptible to corrosion when exposed to halide

compounds such as chloride-bearing ﬂuxes if there is dam-

age to the coating during component manufacture or

printed board assembly, and subsequent exposure of the

component to corrosive materials and moisture. The alumi-

num dopant is very sensitive to basic or halide solutions

such as ﬂuxes and saponiﬁers; the presence of this dopant

should be identiﬁed for ease of failure analysis. This cau-

tion applies to TH as well as SM thin-ﬁlm resistors, both

epoxy coated and bare. Require your supplier of nickel-

chromium (nichrome) resistors to identify use of alu-

minium as an alloying agent.

Small thin-ﬁlm resistors of high value (> 100 kΩ) are the

most susceptible to moisture.

F-7.3.2 Thick-Film Resistor Networks Good tracking

between components on the same substrate.

Resistive ﬁlm can corrode if encapsulant or conformal

coating is breached. Mechanical stresses affect this type at

temperatures < −55°C.

F-7.3.3 Metal Oxide Film Resistors Resistive ﬁlm can

corrode if encapsulant or conformal coating is breached.

Mechanical stresses affect this type at temperatures less

than −55°C.

F-7.3.4 Resistor Chips

Caution

General purpose SM resistors are generally thick-ﬁlm cer-

met on ceramic substrate. Note the ESD sensitivity of bare

ﬁlms and metallic thin ﬁlms over thin oxides. See also the

comments on trimmed ﬁlm resistors.

The reduced component lead surface area of SM resistors

results in higher thermal resistance from resistive ﬁlm to

air. The smaller component and layout areas can result in

higher power densities and hence higher resistive element

temperatures. The smaller heat dissipation areas can result

in higher solder joint and substrate temperatures. Avoid

resistors that have been trimmed more than 50% of value.

Opens occur in the SM ceramic component body due to

damage from mechanical stresses such as overload from

vibration, shock or ﬂexure of the PWA during service life.

Opens occur in the SM ceramic component body and in the

body-to-termination interface due to damage from

IPC-D-279 July 1996