Utah-94-721002-System-Manual.pdf - 第152页
mä~ëã~ä~Ä = lñÑç êÇ=fåë íêìãÉåí ë=m ä~ë ã~=qÉÅÜåçäçÖó= System Manual PKOKR= ^êÅáåÖ=L=éáííáåÖ= Arcing around the showerhead could be related to: (a) Contamination of the showerhead / chambe r walls (e.g. insulating/polyme…
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The DC bias on the lower electrode can be a strong function of the power in any auxiliary plasma source,
for a fixed lower electrode RF power. At low ICP power, there can be a rise in DC bias reading, because of
the increase in the effective area of the grounded electrode. As the ICP power rises, the DC bias is
reduced, as ions from the source begin to dominate the ion flux at the electrode. This reduction in DC bias
is a good sign of plasma from the source reaching the lower electrode.
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The surface of the RF driven electrode takes a negative bias with respect to the plasma. However, the
literature and the industry tend to refer to DC bias as a positive quantity, and we follow this convention
in our equipment.
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The DC bias value will depend on all the process parameters and several aspects of the machine condition.
When the DC bias value is important to the correct operation of the process, it is often possible to use DC
bias as the recipe parameter, and have the RF bias power as a free parameter. The control mode (power
or bias) is selectable on the PC screen where this feature has been provided. However, if you are planning
to use DC bias control mode, it is worth noting the points raised in the preceding sub-sections about
potential causes of inaccuracies / variability in DC bias readings.
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DC bias is a very sensitive indicator of the state of the plasma tool. While this makes it a useful parameter
to measure and record, it also makes it difficult to ensure that the value is consistent from day-to-day on
the same machine, and between nominally identical systems.
It is occasionally requested that the DC bias reading is adjusted to make the reading the same across
different tools, but we have taken the view that it is better to know the actual value.
The main hardware causes for DC bias changes are:
(a) Electrical conductivity of the cooling medium for the electrode or automatch. Check this
by running
briefly with the cooling fluid removed completely. Shifts in DC bias between
dry and cooled states of up to 5% are common. A shift of more than 10% indicates the
fluid is too conducting.
(b) Inadequate cooling of a fluid-cooled automatch. This is sometimes linked with fluid
conductivity, with an electrochemical reaction depositing material in the stainless steel
bulkhead fitting of the automatch.
(c) Changes in dark space shield distance. If the table is not seated correctly, the shield gap
changes and the DC bias value is altered
(d) Oxidation of components in the RF delivery path. The connection between the automatch
and the electrode carries several amperes of RF current. The connection must be sound, or
it can become heated, with a progressive addition to the losses
(e) Loss of the ground path. RF current driving the plasma flows in a closed loop circuit. High
resistance or breaks in the ground return path will alter the DC bias – but usually manifest
themselves first as RF interference problems. Pay particular attention to any straps
securing the dark space screen, the RF shielding under the lower electrode, and the
mounting of the automatch.
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Arcing around the showerhead could be related to:
(a) Contamination of the showerhead / chamber walls (e.g. insulating/polymer coating,
backstreaming of pump oil or excessive use of vacuum grease on o-rings).
(b) A fault in the matching unit, more specifically the DC bias measurement circuit. Running at high
bias for extended periods can potentially cause damage to the DC bias measurement circuit which
can lead to a change in electrode performance and increased plasma potential causing sparking
on grounded walls. DC bias readings are also greatly reduced by this fault.
It may be worth manually scrubbing the showerhead and then trying again. If you are still seeing sparking
then it is worth investigating the matching unit.
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There are a number of plasma clean strategies currently in use:
(a) For
polymer processes (any process containing C
4
F
8
, CHF
3
, or CH
4
, e.g. C
4
F
8
/O
2
, CHF
3
/Ar, CH
4
/H
2
,
CHF
3
/Ar) we use an O
2
based etch to remove the polymer. The rate can often be increased by
adding 10-20% SF
6
, - this is more common in cleaning recipes for ICP chambers.
Typical examples are:
RIE chamber:
O
2
100 sccm
Pressure 100mT
Electrode 200 W
Time* 1-2 hours, but dependent on total process time since last clean
Period* After every 3-10hours etching
* These parameters are dependent on process gases, conditions and chamber wall temperature, so
are subject to change
ICP chamber:
O
2
40 sccm
SF
6
10 sccm (optional, if not available)
Pressure 20mT
ICP Power 1500 W
Electrode 150 W
Backside He 0 mbar
Time* 1-2 hours, but dependent on total process time since last clean
Period* After every 3 to 10 hours etching
* These parameters are dependent on process gases, conditions and chamber wall temperature, so
are subject to change.
(b) For processes which deposit an inorganic film, e.g. a-Si, SiO
2
, BO
x
etc from SiCl
4
, or BCl
3
it may be
necessary to use a more chemical process, e.g.:
SF
6
50 sccm
Pressure 20mT
ICP Power 1500 W
Electrode 150 W
Backside He 0 mbar
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(c) For processes which deposit a combination of etched material and mask layer, e.g. GaAs and
sputtered photoresist during GaAs ‘via hole etching’ it is common to use a mixed Chlorine/fluorine
chemistry:
RIE chamber:
SF
6
85 sccm
Cl
2
50 sccm
Pressure 45mT
Power 150W
Temperature 20 C
Quartz carrier plate
ICP chamber:
Step1: 40sccm Cl
2
, 20sccm SF
6
, 50mT, 500W ICP, 200W RF, 22C, 0Torr He, 20mins to remove GaAs
and PR residues (may need to be longer after lots of ‘via hole etching’).
Step2: 50sccm O
2
, 20mT, 2000W ICP, 200W RF, 22C, 0Torr He, 30mins
Step3: 50sccm O
2
, 60mT, 2000W ICP, 200W RF, 22C, 0Torr He, 30mins
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It is quite a common requirement to process small samples or pieces of wafer. If the process requires
cooling to improve the etch profile or to allow use of resist mask at high power levels, then the small
pieces of wafer must be glued/fixed to a carrier wafer which is clamped and helium cooled. There are
several ways of attaching the small pieces of wafer to the carrier:
(a) Vacuum grease (after etching has been completed the vacuum grease can be removed from back
of wafer using IPA or acetone).
(b) Thermal compound.
(c) Photoresist (i.e. spin a few microns of resist onto a carrier wafer, place the sample on top while
the resist is still wet, push sample down well into resist, and then bake resist).
(d) Use a thermally conductive elastometer pad (see
EMI Shielding and Thermal Management Solutions).
With methods (a), (b) and (d) it is important that the sample completely covers the bonding material, so
that no bonding material is exposed to the plasma and therefore cannot be re-deposited on the wafer.
With all these methods it is necessary to also clamp the carrier wafer and apply helium pressure to the
back of the carrier wafer to provide cooling to the sample (there is no cooling effect simply from gluing
the sample to the carrier if there is no cooling of the carrier).
If the process does not need cooling (as with most low power RIE-only processes) then it is not necessary
to bond the sample to carrier. If the sample is liable to slide off the carrier during transfer, it is often
better to glue pieces of Si to the carrier wafer to act as locating pieces to hold the sample in place. This
avoids the need to glue the sample and therefore keeps the sample cleaner.
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