IPC-TM-650 EN 2022 试验方法--.pdf - 第558页

Note that an uncertainty estimate of 15% (as an e xample) is not meant to suggest t hat the true insertion loss is within 15% of th e r eport ed v alue . Rathe r, th e u nce rtai nty est imat e is mer ely an in di cato r…

1 Scope

This test method is used to determine the mois-

ture and insulation resistances of applied polymer solder mask

under two separate prescribed conditions of temperature and

humidity. One condition is described as Class T and the other

Class H. Raw material qualification testing is performed on

designated comb patterns. Production quality conformance

testing is performed on a standard ‘‘Y’’ pattern.

2 Applicable Documents

Multipurpose One-Sided Test Pattern -

Gerber Format

Qualification and Performance of Permanent

Solder Mask

Requirements for Soldering Fluxes

Acceptability for Printed Boards

3 Test Specimens

The IPC-A-25A-G-KIT artwork package

provides the Gerber files necessary for the fabrication of the

standard IPC-B-25A test board used with this test method.

3.1 Qualification Testing

3.1.1 Class H

Three IPC-B-25A boards using the D comb

patterns with 0.32 mm [0.0126 in] lines/spaces (see Figure 1).

Of which, two are to be coated and one uncoated with solder

mask according to the solder mask supplier’s recommenda-

tions.

3.1.2 Class T

Three IPC-B-25A boards using the E and F

comb patterns with 0.41 mm [0.016 in] lines and 0.51 mm

[0.020 in] spaces (see Figure 1). Of which, two are to be

coated and one uncoated with solder mask according to the

solder mask supplier’s recommendations.

3.2 Conformance Testing

IPC-B-25A board C (‘‘Y’’

shape) pattern with 0.64 mm lines/0.64 mm spacing [0.025 in

lines/0.025 in spacing] or pattern with minimum spacing on

the production board (see Figure 1), whichever has the small-

est line spacing, coated with solder mask according to the

solder mask suppliers recommendations.

4 Apparatus

4.1 Chamber

A clean chamber capable of programming

and recording an environment of 25 ± 2 °C [77 ± 3.6 °F] to at

least 65 ± 2 °C [149 ± 3.6 °F] and 90-98% relative humidity.

This test requires a clean chamber and clean water

for repeatable test results. The following recommendations

are made:

• Incoming water purity should be between 0.5 and 0.1

micro-siemens/cm.

• Fresh deionized water should be used for each test, rather

than using a recirculating water sump.

• Chamber workspaces should be cleaned at least every six

months.

1. www.ipc.org/onlinestore

IPC-2631-1

3000 Lakeside Drive, Suite 309S

Bannockburn, IL 60015-1249

IPC-TM-650

TEST METHODS MANUAL

Number

2.6.3.1

Subject

Solder Mask - Moisture and Insulation Resistance

Date

03/07

Revision

Originating Task Group

Solder Mask Performance Task Group (5-33b)

ASSOCIATION CONNECTING

ELECTRONICS INDUSTRIES

IPC-A-25A-G-KIT1

IPC-SM-840

J-STD-004

IPC-A-600

Figure

IPC-B-25A

Test

Board

NOTE:

Material

this

Test

Methods

Manual

was

voluntarily

established

Technical

Committees

IPC.

material

advisory

only

and

its

use

adaptation

，

entirely

voluntary.

IPC

disclaims

all

liability

any

kind

the

use,

application,

adaptation

this

material.

Users

are

also

wholly

responsible

for

protecting

themselves

against

all

claims

liabilities

for

paten!

infringement.

Equipment

referenced

the

convenience

the

user

and

does

not

imply

endorsement

IPC.

Page

Note that an uncertainty estimate of 15% (as an example) is

not meant to suggest that the true insertion loss is within 15%

of the reported value. Rather, the uncertainty estimate is

merely an indicator for the amount of measurement and

de-embedding error evident at any given point.

5.4.5 Determine the Usable Bandwidth of Reported

Insertion Loss

The uncertainty level described in 5.4.4 can

be used to determine the usable bandwidth of the reported

insertion loss. The user can set up an acceptable uncertainty

level based on a specific application, and then examine the

reported insertion loss value at various frequencies, to deter-

mine its usable bandwidth of reported insertion loss (where

the uncertainty level is smaller than the pre-set value).

5.5 Verification of Reported Insertion Loss

Due to

manufacturing variation, and the uncertainties associated with

the calibration/de-embedding process, it is desirable to make

multiple measurements of the same coupon design to

improve the confidence of the measurement results. This is

critical when the material is in a qualification stage and the

amount of manufactured coupons is limited.

One simple approach to verify the reported insertion loss is to

design coupons with multiple lengths on the same board: L1,

L2, and L3. The de-embedding process outlined in 1.2.2 and

1.3 can be applied to any two length combinations:

unit_12

-γ (L2–L1)

L2–L1

(Eq. 12)

unit_23

-γ (L3–L2)

L3–L2

(Eq. 13)

unit_13

-γ (L3–L1)

L3–L1

(Eq. 14)

It is desirable to have the reported insertion loss per unit

length being consistent (e.g., within 5% of each other). A large

discrepancy indicates either problems in measurement/de-

embedding procedures, or a large manufacturing variation

across the board. An average of the above insertion loss num-

ber can be used to report the final value.

It is also important to note that keeping a large length differ-

ence between any two lengths among L1, L2, and L3 will also

help to improve the quality of reported insertion loss.

5.6 Temperature Impact of Insertion Loss

It is known

that the copper conductivity decreases, and the loss tangent

of dielectric material increases with the increase of environ-

mental temperature. Therefore, the insertion loss increases

with the increase of temperature. Meanwhile, the temperature

impact on insertion loss varies with different printed board

materials.

A Test chamber with variable temperature setting is needed.

A suggested temperature range is 0 °C ~ +100 °C, or other-

wise specified by the tester. Temperature accuracy is < ± 1 °C

of actual set point. Humidity accuracy is < ± 5% RH of actual

set point, or otherwise specified by the tester.

It is recommended to use phase-stabilized cables for tem-

perature ranges of 0 °C ~ +100 °C, or otherwise specified by

the tester. Figure 5-6 provides an example of a temperature

experiment setup.

The following procedures describe how to quantify the tem-

perature impact for a given printed board material:

1) Set up VNA equipment according to 5.1.

2) Bake the test coupon at 120 °C over 6 hours.

3) Calibration VNA equipment to the end of cable with

co-axial connector SOLT standards, with the cable

stayed outside the environment chamber.

4) Move cable end through the conduit of chamber and

connect to the long trace of DUT inside the chamber.

Make sure the conduit is sealed with thermal resistant

material after the cable penetrates the chamber. (Note:

high temperature resistant cable should be used)

5) Set the chamber to the target testing temperature and

humidity.

6) Wait at least half an hour to ensure DUT is set to the

ambient temperature

7) Conduct measurement and record data.

8) Moving to the next temperature and humidity setting

(Step 5), until results of all settings are recorded.

IPC-25514-5-6

Number

2.5.5.14

Subject

Measuring High Frequency Signal Loss and Propagation on

Printed Boards with Frequency Domain Methods

Date

02/2021

Revision

IPC-TM-650

Figure

5-6

Temperature

Experiment

Setup

Page

9) Conduct the short trace characterization from Step 4.

10) Post-process the results using methods described in

Section 1.2.2.

Note:

The humidity is controlled at RH of 50% (±5%) for all

data points, except for 0 and 100 °C.

5.7 Test Report

Below is an example of the list of informa-

tion to be included in the test report. The actual format and

information to be included in the test report may vary based

on the requirement of specific customer:

• VNA Settings: test frequency range, step size, IF bandwidth,

etc.

• Probing method: handheld probe, microwave probe, or

printed board mounted co-axial connector without probes

• Manufacturer and part number of the probe (if used), and

the bandwidth of the probe per 4.2

• Condition of test samples per 3.8.1 or 3.8.2

• Temperature and humidity of testing condition for Room-

Temperature test

• Temperature and humidity of testing condition for Varying-

Temperature test per 5.6

• Calibration or de-embedding method per 1.2.2 or 1.3.1 or

1.3.2

• Insertion loss fitting method per 5.4.2 or 5.4.3

• Values of the insertion loss at test frequencies, in dB/inch or

dB/cm

• Uncertainty estimate at test frequencies per 5.4.4

• Any anomalies in the test or variations from this test method

6 Reference Documents

[1] N. R. Franzen, R. A. Speciale, ‘‘A New Procedure for

System Calibration and Error Removal in Automated

S-Parameter Measurements,’’ Proceedings of the 5th

European Microwave Conference, Hamburg, Germany,

1-4 September 1975, pp. 69-73.

[2] R. A. Soares, P. Gouzien, P. Legaud, G. Follot ‘‘A Unified

mathematical approach to two-port calibration tech-

niques and some applications,’’ IEEE Trans. on MTT, v.

37, N 11 1989, pp. 1669-1674.

[3] R. B. Marks, ‘‘A Multiline Method of Network Analyzer

Calibration,‘‘ IEEE Transactions on Microwave Theory

and Techniques 39, pp. 1205-1215, July 1991.

[4] C. Seguinot et al.: – Multimode TRL ‘‘A new concept in

microwave measurements’’

[5] D. Degroot, J. Jargon, R. Marks, ‘‘Multiline TRL

revealed,’’ 60th ARFTG Conference Digest, Fall 2002.

[6] Y. Shlepnev, ‘‘Broadband material model identification

with GMS-parameters’’, 2015 IEEE 24th Conference on

Electrical Performance of Electronic Packaging and Sys-

tems (EPEPS’2015), October 25-28, 2015, San Jose,

CA.

[7] G. F. Engen and C. A. Hoer, ‘‘Thru-Reflect-Line: An

Improved Technique for Calibrating the Dual Six-Port

Automatic Network Analyzer,‘‘ Microwave Theory and

Techniques, IEEE Transactions on, vol. 27, pp.987-993,

1979.

[8] V. Adamian, B. Cole, ‘‘A Novel Procedure for Character-

ization of Multiport High Speed Balanced Devices,’’

DesignCon, San Jose, CA, 2007.

[9] H. Barnes, E. Bogatin, J. Moreira, J. Ellison, et al. ‘‘A

NIST Traceable PCB Kit for Evaluating the Accuracy of

DeEmbedding Algorithms and Corresponding Metrics,’’

DesignCon 2018.

[10] X. Ye, J. Fan and J. Drewniak, ‘‘New De-embedding

Techniques for PCB Transmission-Line Characteriza-

tion’’, DesignCon 2015.

[11] IEEE P370 open-source 2X-Thru de-embedding code,

https://gitlab.com/IEEE-SA/ElecChar/P370.

[12] https://standards.ieee.org/standard/370-2020.html

[13] S. Moon, X. Ye, R. Smith, ‘‘Comparison of TRL Calibra-

tion vs. 2X-Thru De-embedding Methods,’’ IEEE Interna-

tional Symposium on EMC and SI, 2015.

[14] A. Koul, M. Koledintseva, S. Hinaga, J. Drewniak, ‘‘Dif-

ferential Extrapolation Method for Separating Dielectric

and Rough Conductor Losses in Printed Circuit

Boards,’’ IEEE Transaction on Electromagnetic Compat-

ibility, Vol. 54, No. 2, April 2012.

[15] X. Ye, M. Balogh, ‘‘Physics-Based Fitting to Improve

PCB Loss Measurement Accuracy,’’ IEEE International

Symposium on EMC, 2017.

Number

2.5.5.14

Subject

Measuring High Frequency Signal Loss and Propagation on

Printed Boards with Frequency Domain Methods

Date

02/2021

Revision

IPC-TM-650

Page