IPC-7095C-2013.pdf - 第114页

For proper sectioning, the sample should be molded in resin to alleviate chipping or destruction of the sample dur- ing cross-sectioning (see Figures 7-38 and 7-39). If ﬁne polishing of the area of interest is going to b…

Most SMT joints have voids (under foot, plus inside/toe/

heel ﬁllets). The majority are between 5 to 20 area percent

voids with a small amount at 0% or around 25%. Typical

BGA solder joints average ~10 area percent, with some

averages as low as 5% and others in the 15% range. Within

the BGA the joints had different area percent voids ranging

from 0% to 35%.

Early-fail SMT joints do not have more voids than later-fail

joints. This is based on hundreds of comparisons of sym-

metrical parts: the ‘‘ﬁrst-fail’’ joint does not have a larger

area percent void than the ‘‘last-fail’’ joint. Strong data

shows that variations in normal levels of voids are not

linked to thermal cycle life.

Methods (x-ray and fracture plane visuals) are approxi-

mately equivalent but both are very limited, difficult, or

subjective. One analysis compared void content of several

styles of early-fail BGAs vs. void content of equivalent

later-fail BGAs. No correlation was found. Early and late

failures had the same void content.

Note that all this BGA data involved ‘‘all-ball nets.’’ No

data exists to statistically link ‘‘ﬁrst-fail joint’’ of a BGA to

its life. Therefore there is no numerical correlation of life

vs. void percentage. No data was taken that would be good

enough to establish trends within the 5-10 accuracy that

might be useful.

At this time, there is no new data that would establish a

numerical link (voids vs. life) for any/all of the component

types, under any/all conditions. Some information suggests

that normal voids variations are:

• For in-process control, use >35% area percent as the

threshold with a >50% void diameter threshold

• For reject/rework, use >45% area percent as the criteria

with a >65% void diameter threshold

7.3.7.2 Cracked Peripheral Interconnect Determina-

tions

A torque-limited screwdriver can be used to identify

cracked peripheral interconnects (solder joints). Applying a

small force between the component and substrate will sepa-

rate fractured surfaces, as shown in Figure 7-37. This tech-

nique can identify open connections in a nondestructive

manner, and can determine if an open is due to a lifted

land, interfacial structure or bulk solder structure. This

technique does not work on some substrates, typically

those of low thickness laminates which produce a more

ﬂexible component substrate (interposer).

7.3.8 Destructive Analysis Methods If nondestructive

methods fail to identify the cause of an anomaly, it may be

necessary to use destructive methods to isolate the problem

area. Such techniques will render the analyzed assembly

unusable. Once the cause of the failure has been identiﬁed

the information can be used to implement corrective

actions to eliminate the problem.

7.3.8.1 Cross-Sectioning Cross-sectioning is a destruc-

tive analysis method which looks at a section of the com-

ponents, substrate and solder joints after cutting it apart.

The ﬁrst step in cross-sectioning is to identify or make a

best guess regarding the area that needs to be examined. If

more than one area is suspect then it needs to be deter-

mined whether those areas can be accessed sequentially on

the same component. If not, then the areas will need to be

prioritized according to the possibility of ﬁnding the prob-

lem or more than one component will need to be analyzed.

Next, if the problem area is a part of a larger assembly, it

may need to be isolated into a small more manageable por-

tion by cutting it out of the larger assembly. Care should be

taken to ensure that the evidence is not altered or destroyed

during the cutting process.

IPC-7095c-7-37

Figure 7-37 Engineering Crack Evaluation Technique

Side View

End View

BGA

Torque Screwdriver set at ~ 0.02 Nm

~ 0.03 mm minimum gap

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For proper sectioning, the sample should be molded in

resin to alleviate chipping or destruction of the sample dur-

ing cross-sectioning (see Figures 7-38 and 7-39). If ﬁne

polishing of the area of interest is going to be required,

then the sample should be sectioned a reasonable distance

away from the interface of interest leaving sufficient dis-

tance for ﬁne polishing of the interface.

In some cases, the entire component may need to be

ground through and looked at for the integrity of various

interfaces. A common failure analyzed through cross-

sectioning is an open occurring in an assembly. Such opens

may occur at the solder interface.

7.3.8.2 Dye Penetrant Dye penetrant methods can be

used during process set-up and in failure analysis to detect

solder joint cracking and wetting problems, and package

delamination. The sample is immersed in a low viscosity

liquid dye which penetrates any cracks, delaminated areas,

or open voids. The sample can then be peeled away and

examined for the presence of dye in the solder joints or at

material interfaces. If a ﬂuorescent dye is used, the sample

is inspected under UV light. The dye enhances the visibil-

ity of ﬂaws that might otherwise be difficult to detect. The

presence of dye on a solder land indicates poor wetting to

the land, and can be used to estimate the portion of the land

that was not wetted; however, very thin cracks may be so

small that liquids cannot completely enter because the sur-

face tension of the liquid will not allow it (see Figures 7-40

and 7-41).

7.4 Testing and Product Verification

7.4.1 Electrical Testing

Electrical testing is used to

evaluate the functionality of the electronic assembly. There

are two commonly used electrical test approaches:

in-circuit test (ICT) and functional test (FT).

ICT utilizes a dedicated bed-of-nails ﬁxture to probe the

completed assembly. This test method is used to detect

faults caused by the manufacturing process and also to iso-

late the majority of nonfunctional components. The faults

found by ICT include solder bridge, solder open, compo-

nent mis-orientation, wrong component, component not

functional and conductor short.

Figure 7-38 A Solder Ball Cross Sectioned Through a Void

in the Solder Ball

Figure 7-39 Cross-Section of a Crack Initiation at the Ball/

Pad Interface

Figure 7-40 No Dye Penetration Under the Ball

Figure 7-41 Corner Balls have 80-100% Dye Penetration

Which Indicate a Crack

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Another approach is to place a low cost in-circuit tester

near the end of the assembly line and use it as a manufac-

turing defect analyzer (MDA). Boards are tested immedi-

ately after the components are placed and soldered. Prob-

lems are quickly relayed back to manufacturing so

corrective action can take place while the product is being

assembled.

ICT can be supplemented by a complete functional test at

the end of assembly. This test for product functionality can,

depending on type of product and the acceptability require-

ments, be as simple as a ‘‘go/no-go’’ test or as complex as

a complete exercising of all circuit functionality. FT is used

to detect device faults on the assembly at speed. With the

higher temperatures on lead-free solder pastes, there may

be an increase in oxidized test lands or test vias. Typically,

with tin/lead alloys you may print and reﬂow solder pastes

to provide a soldered test point for the ICT probes. Lead-

free solder pastes do not wet as well and may cause issues

with ICT. It is recommended to run a quick experiment

during the development stage of the process to understand

the impact of lead-free solder pastes on this process.

7.4.2 Test Coverage Given the current complexity in

electronic assemblies, the level of ‘‘coverage’’ of test has

become an industry issue. The more complex a board or

assembly, the more difficult it is to fully test. Indeed, it may

be difficult to test even a reasonable portion of the assem-

bly in a reasonable, i.e., cost effective, period of time.

While test of an assembly may be aided by incorporating

test into the silicon devices, this strategy is not applicable

to bare boards. Thus the challenge of test is to provide test

coverage at a high level of conﬁdence within a reasonable

period of time.

An effective process monitoring system consists of over-

lapping tools that create a large bandwidth of coverage.

Multiple tools and methods are required since there is not

one single tool or method that provides the desired cover-

age. Optical inspection, X-ray, SAM, ICT and FT are

examples of overlapping coverage. These veriﬁcation

methods should be used to monitor products and process;

they should not be used solely to screen and separate good

and bad product.

7.4.3 Burn-In Testing Burn-in is an operational and

environmental test of the complete assembly at the upper

limits of the application. This test typically ﬁnds more

component related problems than solder joint defects. The

use of burn-in testing is still in use for component evalua-

tion. Burn-in on electronic assembly is decreasing in favor

of some form of accelerated test exposure to screen out

marginal results.

7.4.4 Product Screening Tests Environmental stress

screening (ESS) is used to screen ongoing production for

poor product quality and latent defects. The purpose of

ESS is to accelerate the latent defects to actual failures,

thus eliminating these latent defects from causing failures

in the ﬁeld. Care must be taken that the ESS procedures are

not sufficiently severe to damage good product and produce

new latent defects. Solder fatigue life on BGAs shall be

evaluated on the thermal cycling of these ESS tests, other

tests, and the operating life thermal environments.

7.5 Void Identification The degree of voids permitted in

the BGA assembly attachment process and the impact on

reliability is of interest to members of the electronics

industry. The detailed requirements for end product accep-

tance shall be in accordance with J-STD-001; workman-

ship requirements shall follow the requirements of IPC-A-

610.

This section establishes the useful process development

and maintenance criteria to minimize occurrence of voids.

Current industry data suggests that voids in the solder joint

are not a reliability concern. In fact, the appearance of a

void after assembly reﬂow is an indicator that the reﬂow

process has taken place and the BGA ball has changed

characteristics. However, the aim of the process engineer

should be to minimize voids because excessive frequency

of voids may be an indication that the manufacturing

parameters need to be adjusted. Two reported causes of

voids are trapped ﬂux that has not had enough time to be

released from the solder paste, and contaminants on

improperly cleaned circuit boards. Voids appear as a lighter

area inside the solder balls and are usually found randomly

throughout the package. Some X-ray systems can distort

the size of voids through blooming. It is possible to accu-

rately measure the true volume of a void but the procedure

can be involved and requires a known reference for radio-

metric calibration of the X-ray ﬁlm or detector.

The size of BGA voids is not always the best criteria for

determining fatigue life of the solder joint. Large macro

process voids away from the solder joint to the component

land interface may not be a problem, whereas small voids

at the interface can become the criteria for fracture once a

crack starts. The location of the voids within the solder

joint is a bigger issue than the size and number of voids. In

most cases the effort is better spent on identifying and

eliminating the cause of the voids by following the design

and reﬂow proﬁles suggested in this document.

7.5.1 Sources of Voids There can be voids in a BGA

solder ball, in the solder joint to BGA interface, or in the

solder joint to PCB interface. Various sources or reasons

can be responsible for these voids.

Voids in the solder joints can be carried over from original

voids in solder balls, which could be the result of the ball

manufacturing process. Voids can be induced into the

reﬂowed solder joint by either the voids in the original

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