IPC-7095C-2013.pdf - 第82页

6.5.4.2 In-Circuit Test Concerns In-circuit testing is used to ﬁnd shorts, opens, wrong parts, reversed parts, bad devices, incorrect assembly of printed board assemblies and other manufacturing defects. In-circuit testi…

when all the systems have already been shipped. Before the

PWB design starts, requirements for the system testability

functions should be presented at the conceptual design

review. These requirements and any derived requirements

should be partitioned down to the various printed board

assemblies and documented. The system and program level

test criteria and how they are partitioned down to the

printed board assembly requirements are beyond the scope

of this document.

The two basic types of printed board assembly test are

functional test and in-circuit test. Functional testing is used

to test the electrical design functionality. Functional testers

access the board under test through the connector, test

points, or bed-of-nails. The board is functionally tested by

applying predetermined stimuli (vectors) at the printed

board assembly’s inputs while monitoring the printed board

assembly outputs to ensure that the design responds prop-

erly. In-circuit testing is used to ﬁnd manufacturing defects

in printed board assemblies.

In-circuit testers access the board under test through the

use of a bed-of-nails ﬁxture which makes contact with each

node on the printed board assembly. The printed board

assembly is tested by exercising all the parts on the board

individually. In-circuit testing places fewer restrictions on

the design. Conformal coated printed board assemblies and

many Surface Mount Technology (SMT) and mixed tech-

nology printed board assemblies present bed-of-nails

physical access problems which may prohibit the use of

in-circuit testing. Primary concerns for in-circuit test are

that the lands or pins (1) must be on grid (for compatibility

with the use of bed-of-nails ﬁxture), and (2) should be

accessible from the bottom side (a.k.a. noncomponent or

solder side of through-hole technology boards) of the

printed board assembly.

Manufacturing Defects Analyzer (MDA) provides a low

cost alternative to the traditional in-circuit tester. Like the

in-circuit tester, the MDA examines the construction of the

printed board assembly for defects. It performs a subset of

the types of tests, mainly only tests for shorts and open

faults without power applied to the printed board assembly.

For high volume production with highly controlled manu-

facturing processes (i.e., Statistical Process Control tech-

niques), the MDA may have application as a viable part of

a printed board assembly test strategy. Vectorless Test is

another low cost alternative to in-circuit testing. Vectorless

Test performs testing for ﬁnding manufacturing process-

related pin faults for SMT boards and does not require pro-

gramming of test vectors. It is a powered-off measurement

technique consisting of three basic types of tests:

1. Analog Junction Test – DC current measurement test

on unique pin pairs of the printed board assembly

using the ESD protection diodes present on most

digital and mixed signal device pins.

2. RF Induction Test – Magnetic induction is used to test

for device faults utilizing the printed board assemblies

device protection diodes. This technique uses chip’s

power and ground pins to make measurements for

ﬁnding solder opens on device signal paths, broken

bond wires, and devices damaged by ESD. Parts incor-

rectly oriented can also be detected. Fixturing contain-

ing magnetic inducers are required for this type of test.

3. Capacitive Coupling Test – This technique uses

capacitive coupling to test for pin opens and does not

rely on internal device circuitry, but instead relies on

the presence of the metallic lead frame of the device to

test the pins. Connectors and sockets, lead frames and

correct polarity of capacitors can be tested using the

technique.

6.5.4.1 Board Flexure During Testing Since lead-free

joints can be stiffer and less ductile than tin/lead joints,

in-circuit/functional test ﬁxtures can damage solder joints if

their design and manufacturing results in excessive board

ﬂexing during use. This board ﬂex induced damage is typi-

cally caused by improper location of board supports and

hold-downs, especially around areas with high concentra-

tions of test probes. Excessive board ﬂexure may also be

caused by improper planar alignment of supports and hold-

downs, high probe forces, as well as by excessive or insuf-

ﬁcient vacuum or improper distribution of springs between

top plate and probe plate. In addition, improperly designed

tooling and ﬁxtures can easily lead to improper ﬂexure of

the PCB, leading to damage.

In order to ensure that a test ﬁxture does not cause damage

to printed circuit assemblies (PCAs), strain and strain-rate

must be measured on PCAs during use of the test ﬁxture.

Measurements must be done at the corners of BGAs using

three element rectangular rosettes placed according to the

recommended gauge placement in IPC/JEDEC-9704.

Strains and strain-rates should be speciﬁed in a ‘‘strain

limit speciﬁcation’’ deﬁning actuation, test or release

requirements of the unit under test (UUT).

• The strain measurement system must simultaneously

sample all elements in each rosette (e1, e2, e3) in order

to properly measure and calculate all strain components

• The generally accepted strain limits for tin/lead PCAs is

600 µε, either principal or diagonal

• The generally accepted strain limits for lead-free PCAs is

450 µε, either principal or diagonal

• The generally accepted maximum strain rate is 30,000

µε/sec, either principal or diagonal

• Typical damage acceptance criteria is: No damage to

BGA solder joints detected using cross-section FA

method

January 2013 IPC-7095C

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6.5.4.2 In-Circuit Test Concerns In-circuit testing is

used to ﬁnd shorts, opens, wrong parts, reversed parts, bad

devices, incorrect assembly of printed board assemblies

and other manufacturing defects. In-circuit testing is nei-

ther meant to ﬁnd marginal parts nor to verify critical tim-

ing parameters or other electrical design functions.

In-circuit testing of digital printed board assemblies can

involve a process that is known as backdriving (see IPC-T-

50). Backdriving can also cause devices to oscillate and the

tester can have insufficient drive to bring a device out of

saturation. Backdriving can be performed only for con-

trolled periods of time, or the junction of the device (with

the overdriven output) will overheat.

The two main concerns for designing the printed board and

printed board assembly for in-circuit testability are design

for compatibility with in-circuit test ﬁxturing and electrical

design considerations.

6.5.4.3 Functional Testing Concerns There are several

concerns for designing the printed board assembly for

functional testability. The use of test connectors, problems

with initialization and synchronization, long counter

chains, self-diagnostics, and physical testing are topics

which are discussed in detail in the following subsections

and are not meant to be tutorials on testability but rather

ideas of how to overcome typical functional testing prob-

lems. Fault isolation on conformal coated boards or most

SMT and mixed technology designs can be very difficult

because of the lack of access to the circuitry on the board.

If strategic signals are brought out to a test connector or an

area on the printed board where the signals can be probed

(test points), fault isolation may be much improved. This

lowers the cost of detection, isolation and correction. It is

also possible to design the circuit so that a test connector

can be used to stimulate the circuit (such as taking over a

data bus via the test connector) or disable functions on the

printed board assembly (such as disabling a free running

oscillator and adding single step capability via the test con-

nector).

6.6 Other Design for Manufacturability Issues The lay-

out generation process should include a formal design

review of layout details by as many affected disciplines

within the company as possible, including fabrication,

assembly and testing. The approval of the layout by repre-

sentatives of the affected disciplines will ensure that these

production-related factors have been considered in the

design. The success or failure of an interconnecting struc-

ture design depends on many interrelated considerations.

From an end-product usage standpoint, the impact on the

design by the following typical parameters should be con-

sidered. Other design for manufacturability issues include:

• Equipment environmental conditions, such as ambient

temperature, heat generated by the components, ventila-

tion, shock and vibration

• If an assembly is to be maintainable and repairable, con-

sideration must be given to component/circuit density, the

selection of board/conformal coating materials, and com-

ponent placement for accessibility

• Installation interface that may affect the size and location

of mounting holes, connector locations, lead protrusion

limitations, part placement, and the placement of brackets

and other hardware

• Testing/fault location requirements that might affect com-

ponent placement, conductor routing, connector contact

assignments, etc.

• Process allowances such as etch factor compensation for

conductor widths, spacings, land fabrication, etc.

• Manufacturing limitations such as minimum etched fea-

tures, minimum plating thickness, board shape and size,

etc.

• Coating and marking requirements

• Assembly technology used, such as surface mount

• Through-hole, and mixed

• Board performance class

• Materials selection

• Producibility of the printed board assembly as it pertains

to manufacturing equipment limitations

– Flexibility (Flexural) Requirements

– Electrical/Electronic

– Performance Requirements

• ESD sensitivity considerations

6.6.1 Panel/Pallet Design Panelization of boards and

pallets is a standard process for both test and assembly. A

datum system is required for the fabrication panel, as well

as each individual board or pallet in the panel. To reduce

tolerance buildup, it is important to relate each individual

datum to the panel datum (see Figure 6-31).

Most assembly companies want to build the assembly in

pallet format, similar to that shown in Figure 6-31. The

board manufacturer of these pallets would position them

on the standard fabrication panel, which is usually 460 x

610 mm. Designers are encouraged to work with their

manufacturing suppliers in order to optimize the material

movement, and the manner in which the pallets/boards are

removed from their respective position and how they are

tested.

6.6.2 In-Process/End Product Test Coupons Coupons

have been used by the industry for many years in an effort

to evaluate the product being built. These coupons repre-

sented the features of the board or the features of the

assembly. They are incorporated into the borders of the

panels either used for board manufacturing or the pallets

provided to the assembly company. Most manufacturers

and assemblers have their processes in control, neverthe-

less, coupons are of value to make certain through various

IPC-7095C January 2013

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No reproduction or networking permitted without license from IHS

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physical evaluations that the process and the recipe used to

make the part stay in the control that is necessary to meet

requirements. This concept is essential for BGAs since one

cannot see the lands or the solder joints once the assembly

has taken place. Test coupons or specimens should reﬂect

the speciﬁc board or panel characteristics. The data derived

from panels should be used to establish the requirements

for vias and lands, conductors, spaces, etc. When speci-

mens are used to establish process control parameters, they

shall consistently use single hole size or land conﬁguration

which reﬂects the process. Process characteristics and gen-

eral board characteristics should be matched.

IPC-2221 provides excellent coupons that are used to

evaluate those board and assembly characterizations. They

include:

• Hole Solderability

• Solder Resist Tenting

• Thermal Stress Plating

• Thickness and Bond Strength

• Plating Adhesion

• Surface Solderability

• Solder Resist

• Surface Mount Solderability

• Surface Bond Strength

• Surface Insulation Resistance

• Moisture Insulation Resistance

• Registration

• Interconnect Resistance

Figure 6-32 shows alternate coupons that can be used to

evaluate the cleanliness of a board after ball attachment has

been completed. These comb patterns are used on the board

in order to make certain that ﬂux or ﬂux residue does not

impair the electrical properties of the product.

6.7 Thermal Management The primary objective of

thermal management is to ensure that all circuit compo-

nents, especially the BGAs, are maintained within both

functional and maximum allowable limits. The functional

temperature limits provide the ambient or component pack-

age (case) temperature range within which the electronic

circuits can be allowed to properly perform.

IPC-7095c-6-31

Figure 6-31 Board Panelization

X.XX

X.XXX

X.XX

X.XXX

DATUM

X.XXX

X.XX

8 BOARD PANELIZATION

PANEL TOOLING HOLE

(3 PLACES)

INDIVIDUAL BOARD TOOLING HOLES

(3 PLACES PER BOARD)

January 2013 IPC-7095C

Provided by IHS under license with IPC

Not for Resale

No reproduction or networking permitted without license from IHS

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