IPC-7095C-2013.pdf - 第9页
7.2.2 Use of Underfills and Adhesives ....................... 86 7.2.3 Depaneling of Boards and Modules ................. 90 7.3 Inspection T echniques ........................................ 91 7.3.1 X-Ray Usage .......…
4.8.3 Solder Ball Attach Integrity .............................. 35
4.8.4 Package and Ball Coplanarity ........................... 35
4.8.5 Moisture Sensitivity (Baking, Storage,
Handling, Rebaking) .......................................... 36
4.8.6 Shipping Medium (Tape and Reel, Trays,
Tubes) ................................................................. 37
4.8.7 Solder Ball Alloy ............................................... 37
5 PRINTED BOARDS AND OTHER MOUNTING
STRUCTURES
........................................................ 37
5.1 Types of Mounting Structures ........................... 37
5.1.1 Organic Resin Systems ...................................... 37
5.1.2 Inorganic Structures ........................................... 37
5.1.3 Layering (Multilayer, Sequential or
Build-Up) ........................................................... 37
5.2 Properties of Mounting Structures .................... 37
5.2.1 Resin Systems .................................................... 37
5.2.2 Reinforcements .................................................. 38
5.2.3 Laminate Material Properties ............................ 39
5.3 Surface Finishes ................................................. 40
5.3.1 Hot Air Solder Leveling (HASL) ..................... 41
5.3.2 Organic Surface Protection (Organic
Solderability Preservative) OSP Coatings ........ 42
5.3.3 Noble Platings/Coatings .................................... 42
5.4 Solder Mask ....................................................... 46
5.4.1 Wet and Dry Film Solder Masks ...................... 46
5.4.2 Photoimageable Solder Masks .......................... 47
5.4.3 Jettable Solder Mask ......................................... 47
5.4.4 Registration of Board to Panel Image for
Solder Mask ....................................................... 47
5.4.5 Via Protection .................................................... 47
5.5 Thermal Spreader Structure Incorporation
(e.g., Metal Core Boards) .................................. 48
5.5.1 Lamination Sequences ....................................... 48
5.5.2 Heat Transfer Pathway ...................................... 48
6 PRINTED CIRCUIT ASSEMBLY DESIGN
CONSIDERATION ................................................... 50
6.1 Component Placement and Clearances ............. 50
6.1.1
Pick and Place Requirements ............................ 50
6.1.2
Repair/Rework Requirements ............................ 50
6.1.3
Global Placement ............................................... 51
6.1.4 Alignment Legends (Silkscreen, Copper
Features, Pin 1 Identifier) .................................. 51
6.2
Attachment Sites (Land Patterns and Vias) ...... 52
6.2.1
Big vs. Small Land and Impact on Routing ..... 52
6.2.2 Solder Mask vs. Metal Defined Land
Design ................................................................ 52
6.2.3
Conductor Width ................................................ 53
6.2.4
Via Size and Location ....................................... 54
6.3 Escape and Conductor Routing Strategies ........ 54
6.3.1 Escape Strategies ............................................... 57
6.3.2 Surface Conductor Details ................................. 58
6.3.3 Dog Bone Through Via Details ........................ 58
6.3.4 Design for Mechanical Strain ........................... 58
6.3.5 Uncapped Via-in-Pad and Impact on
Reliability Issues ................................................ 59
6.3.6 Fine Pitch BGA Microvia in Pad Strategies ..... 60
6.3.7 Power and Ground Connectivity ....................... 61
6.4 Impact of Wave Solder on Top Side BGAs ..... 61
6.4.1 Top Side Reflow ................................................ 61
6.4.2 Impact of Top Side Reflow ............................... 61
6.4.3 Methods of Avoiding Top Side Reflow ............ 62
6.4.4 Top Side Reflow for Lead-Free Boards ............ 64
6.5 Testability and Test Point Access ...................... 64
6.5.1 Component Testing ............................................ 64
6.5.2 Damage to the Solder Balls During Test and
Burn-In ............................................................... 64
6.5.3 Bare Board Testing ............................................ 65
6.5.4 Assembly Testing ............................................... 66
6.6 Other Design for Manufacturability Issues ....... 68
6.6.1 Panel/Pallet Design ............................................ 68
6.6.2 In-Process/End Product Test Coupons .............. 68
6.7 Thermal Management ........................................ 69
6.7.1 Conduction ......................................................... 70
6.7.2
Radiation ............................................................ 70
6.7.3
Convection ......................................................... 70
6.7.4
Thermal Interface Materials .............................. 71
6.7.5
Heat Sink Attachment Methods for BGAs ....... 72
6.8
Documentation and Electronic Data Transfer ... 73
6.8.1
Drawing Requirements ...................................... 74
6.8.2
Equipment Messaging Protocols ....................... 74
6.8.3
Specifications ..................................................... 75
7 ASSEMBLY OF BGAS ON PRINTED CIRCUIT
BOARDS
................................................................. 76
7.1
SMT Assembly Processes .................................. 76
7.1.1
Solder Paste and Its Application ....................... 76
7.1.2
Component Placement Impact ........................... 78
7.1.3
Vision Systems for Placement ........................... 78
7.1.4
Reflow Soldering and Profiling ......................... 79
7.1.5
Material Issues ................................................... 84
7.1.6
Vapor Phase ....................................................... 84
7.1.7
Cleaning vs. No-Clean ...................................... 84
7.1.8
Package Standoff ............................................... 85
7.2
Post-SMT Processes .......................................... 86
7.2.1
Conformal Coatings ........................................... 86
IPC-7095C January 2013
vi
Copyright IPC-Association Connecting Electronics Industries
Provided by IHS under license with IPC
Not for Resale
No reproduction or networking permitted without license from IHS
--`,,```,,,,````-`-`,,`,,`,`,,`---
7.2.2 Use of Underfills and Adhesives ....................... 86
7.2.3 Depaneling of Boards and Modules ................. 90
7.3 Inspection Techniques ........................................ 91
7.3.1 X-Ray Usage ...................................................... 91
7.3.2 X-Ray Image Acquisition .................................. 91
7.3.3 Definition and Discussion of X-Ray System
Terminology ....................................................... 92
7.3.4 Analysis of the X-Ray Image ........................... 95
7.3.5 Scanning Acoustic Microscopy ......................... 97
7.3.6 BGA Standoff Measurement ............................. 97
7.3.7 Optical Inspection .............................................. 97
7.3.8 Destructive Analysis Methods ........................... 99
7.4 Testing and Product Verification ..................... 100
7.4.1 Electrical Testing ............................................. 100
7.4.2 Test Coverage .................................................. 101
7.4.3 Burn-In Testing ................................................ 101
7.4.4 Product Screening Tests .................................. 101
7.5 Void Identification ........................................... 101
7.5.1 Sources of Voids .............................................. 101
7.5.2 Void Classification ........................................... 102
7.5.3 Voids in BGA Solder Joints ............................ 102
7.6 Void Measurement ........................................... 104
7.6.1 X-Ray Detection and Measurement
Cautions ........................................................... 104
7.6.2 Impact of Voids ................................................ 104
7.6.3 Void Protocol Development ............................ 104
7.6.4 Sampling Plans for Void Evaluation ............... 105
7.7 Process Control for Void Reduction ............... 106
7.7.1 Process Parameter Impact on Void
Formation ......................................................... 106
7.7.2 Process Control Criteria for Voids in
Solder Balls ...................................................... 108
7.7.3
Process Control Criteria .................................. 109
7.8
Solder Defects .................................................. 109
7.8.1
Solder Bridging ................................................ 109
7.8.2
Cold Solder ...................................................... 109
7.8.3
Opens ............................................................... 109
7.8.4
Insufficient/Uneven Heating ............................ 109
7.8.5
Head-on-Pillow ................................................ 110
7.8.6
Hanging Ball/Non-Wet Open (NWO) ............. 112
7.8.7
Component Defects .......................................... 112
7.8.8
Defect Correlation/Process Improvement ....... 113
7.9
Repair Processes .............................................. 113
7.9.1
Rework/Repair Philosophy .............................. 113
7.9.2
Removal of BGA ............................................. 113
7.9.3
Replacement ..................................................... 114
8 RELIABILITY ......................................................... 117
8.1 Reliability Drivers for BGAs .......................... 117
8.1.1 Cyclic strain ..................................................... 117
8.1.2 Fatigue .............................................................. 117
8.1.3 Creep ................................................................ 118
8.1.4 Creep and Fatigue Interaction ......................... 118
8.1.5 Mechanical reliability ...................................... 119
8.2 Damage Mechanisms and Failure of Solder
Attachments ...................................................... 119
8.2.1 Comparison of Thermal Fatigue Crack
Growth Mechanism in SAC vs. Tin/Lead
BGA Solder Joints ........................................... 119
8.2.2 Mixed Alloy Soldering .................................... 121
8.3 Solder Joints and Attachment Types ............... 122
8.3.1 Global Expansion Mismatch ........................... 123
8.3.2 Local Expansion Mismatch ............................. 123
8.3.3 Internal Expansion Mismatch .......................... 123
8.4 Solder Attachment Failure ............................... 123
8.4.1 Solder Attachment Failure Classification ........ 123
8.4.2 Failure Signature-1: Cold Solder .................... 123
8.4.3 Failure Signature-2: Land, Nonsolderable ...... 124
8.4.4 Failure Signature-3: Ball Drop ........................ 124
8.4.5 Failure Signature-4: Missing Ball ................... 124
8.4.6 Failure Signature-5: PCB and BGA Stack
Warpage ............................................................ 124
8.4.7 Failure Signature-6: Mechanical Failure ......... 126
8.4.8 Failure Signature-7: Insufficient Reflow ......... 127
8.5 Critical Factors to Impact Reliability ............. 127
8.5.1 Package Technology ........................................ 127
8.5.2 Stand-Off Height .............................................. 128
8.5.3 PCB Design Considerations ............................ 129
8.5.4 Reliability of Solder Attachments of
Ceramic Grid Array ......................................... 129
8.5.5 Lead-Free Soldering of BGAs ........................ 129
8.6 Design for Reliability (DfR) Process .............. 135
8.7 Validation and Qualification Tests .................. 135
8.8 Screening Procedures ....................................... 136
8.8.1 Solder Joint Defects ......................................... 136
8.8.2 Screening Recommendations ........................... 136
8.9 Accelerated Reliability Testing ....................... 136
9 DEFECT AND FAILURE ANALYSIS CASE
STUDIES ............................................................... 138
9.1 Solder Mask Defined BGA Conditions ........... 138
9.1.1 Solder Mask Defined and Nondefined
Lands ................................................................ 138
9.1.2 Solder Mask Defined Land on Product
Board ................................................................ 139
9.1.3
Solder Mask Defined BGA Failures ............... 139
January 2013 IPC-7095C
vii
Copyright IPC-Association Connecting Electronics Industries
Provided by IHS under license with IPC
Not for Resale
No reproduction or networking permitted without license from IHS
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9.2 Over-Collapse BGA Solder Ball Conditions .. 140
9.2.1 BGA Ball Shape without Heat Slug
500 µm Standoff Height .................................. 140
9.2.2 BGA Ball Shape with Heat Slug 375 µm
Standoff Height ................................................ 140
9.2.3 BGA Ball Shape with Heat Slug 300 µm
Standoff Height ................................................ 140
9.2.4 Critical Solder Paste Conditions ..................... 141
9.2.5 Overly Thick Paste Deposit ............................ 141
9.2.6 Void Determination Through X-Ray and
Cross-Section ................................................... 141
9.2.7 Voids and Uneven Solder Balls ...................... 141
9.2.8 Eggshell Void ................................................... 142
9.3 BGA Interposer Bow and Twist ...................... 142
9.3.1 BGA Interposer Warp ...................................... 142
9.3.2 Solder Joint Opens Due to Interposer Warp ... 143
9.4 Solder Joint Conditions ................................... 143
9.4.1 Target Solder Condition .................................. 143
9.4.2 Solder Balls with Excessive Oxide ................. 143
9.4.3 Evidence of Dewetting .................................... 144
9.4.4
Mottled Condition ............................................ 144
9.4.5
Tin/Lead Solder Ball Evaluation ..................... 144
9.4.6
SAC Alloy ........................................................ 144
9.4.7
Cold Solder Joint ............................................. 145
9.4.8 Incomplete Joining Due to Land
Contamination .................................................. 145
9.4.9
Deformed Solder Ball Contamination ............. 145
9.4.10
Deformed Solder Ball ...................................... 145
9.4.11 Insufficient Solder and Flux for Proper Joint
Formation ......................................................... 146
9.4.12
Reduced Termination Contact Area ................ 146
9.4.13
Solder Bridging ................................................ 146
9.4.14
Incomplete Solder Reflow ............................... 146
9.4.15
Missing Solder ................................................. 147
9.4.16
Nonwet Open (NWO) Solder Joint ................. 147
9.4.17
Head-on-Pillow (HoP) Solder Joint ................ 147
10 GLOSSARY AND ACRONYMS .......................... 148
11 BIBLIOGRAPHY AND REFERENCES ............... 150
Appendix A Process Control Characterization to
Reduce the Occurrence of Voids
..... 151
Figures
Figure 3-1
BGA Package Manufacturing Process ............. 3
Figure 3-2
Area Array I/O Position Comparisons .............. 5
Figure 3-3
Area Array I/O Position Patterns ...................... 5
Figure 3-4
MCM Type 2S-L-WB ......................................... 6
Figure 3-5
Conductor Width to Pitch Relationship ............ 7
Figure 3-6 Plastic Ball Grid Array, Chip Wire Bonded ....... 8
Figure 3-7 Ball Grid Array, Flip Chip Bonded .................... 8
Figure 3-8 BGA Warpage ................................................. 11
Figure 3-9 Examples of Pad Cratering ............................ 13
Figure 3-10 Various Possible Failure Modes for a BGA
Solder Joint ..................................................... 13
Figure 4-1 Termination Types for Area Array Packages .. 16
Figure 4-2 BOC BGA Construction .................................. 18
Figure 4-3 Top of Molded BOC Type BGA ...................... 18
Figure 4-4 Flip-Chip (Bumped Die) on BGA Substrate ... 19
Figure 4-5 JEDEC Standard Format for Package-on-
Package Components .................................... 22
Figure 4-6 Polymer Coated Sphere Interconnection ....... 23
Figure 4-7 Plastic Ball Grid Array (BGA) Package .......... 24
Figure 4-8 Cross-Section of a Thermally Enhanced
Ceramic Ball Grid Array (CBGA) Package ..... 25
Figure 4-9 Ceramic Ball Grid Array (CBGA) Package
with Molded Polymer Encapsulation .............. 25
Figure 4-10 Ceramic-Based Column Grid Array (CCGA)
Package .......................................................... 26
Figure 4-11 Polyimide Film-Based Lead-Bond µBGA
Package Substrate Furnishes Close
Coupling Between Die Pad and Ball
Contact ........................................................... 26
Figure 4-12 Comparing In-Package Circuit Routing
Capability of the Single Metal Layer
Tape Substrate to Two Metal Layer
Tape Substrate ............................................... 26
Figure 4-13 Single Package Die-Stack BGA ..................... 27
Figure 4-14 Custom Eight Die (Flip-Chip and
Wire-Bond) SiP Assembly .............................. 27
Figure 4-15 Folded Multiple-Die BGA Package ................. 27
Figure 4-16 Eight Layer Ball Stack Package ..................... 27
Figure 4-17 SO-DIMM Memory Card Assembly ................ 28
Figure 4-18 Folded and Stacked Multiple Die
BGA Package ................................................. 28
Figure 4-19 Package-on-Package Assembly ..................... 28
Figure 4-20 Semiconductors Packaged with
µPILR Substrate ............................................. 29
Figure 4-21 Solder Interface Between µPILR-Configured
Substrate Interposer and Circuit Board .......... 29
Figure 4-22 BGA Connector ............................................... 29
Figure 4-23 PGA Socket Pins ............................................ 30
Figure 4-24 PGA Socket With and Without Pick and
Place Cover .................................................... 30
Figure 4-25 LGA Contact Pin ............................................. 31
Figure 4-26 LGA Socket With and Without Pick and
Place Cover .................................................... 31
Figure 4-27 Example of Missing Balls on a BGA
Component ..................................................... 35
Figure 4-28 Example of Voids in Eutectic Solder Balls
at Incoming Inspection ................................... 35
Figure 4-29 Examples of Solder Ball/Land Surface
Conditions ....................................................... 35
Figure 4-30
Establishing BGA Coplanarity Requirement ... 36
IPC-7095C January 2013
viii
Copyright IPC-Association Connecting Electronics Industries
Provided by IHS under license with IPC
Not for Resale
No reproduction or networking permitted without license from IHS
--`,,```,,,,````-`-`,,`,,`,`,,`---