743844-015.pdf - 第118页
Table 36. Supported DDR5 Memory Down Device Configurations (H/P/U Refresh - Processor Line) Maximum System Capacity 2 PKG Type (Die bits x Package bits) DRAM Organizati on / Package Type Package Density Die Density Dies …
Table 33. Supported DDR5 Non-ECC UDIMM Module Configurations (S/S Refresh -
Processor Line)
Raw
Card
Version
DIMM
Capacity
DRAM
Device
Technology
DRAM
Organization
# of
DRAM
Devices
# of
Ranks
# of Row/Col
Address Bits
# of Banks
Inside
DRAM
Page
Size
A 16 GB 16 Gb 2048M x 8 8 1 17/10 16 8K
C 8 GB 16 Gb 1024M x 16 4 1 17/10 8 8K
B 32 GB 16 Gb 2048M x 8 16 2 17/10 16 8K
A 24 GB 24 Gb 3072M x 8 8 1 17/10 32 8K
C 12 GB 24 Gb 1536M x 16 4 1 17/10 16 8K
B 48 GB 24 Gb 3072M x 8 16 2 17/10 32 8K
Table 34. Supported DDR5 ECC UDIMM Module Configurations (S/S Refresh/E/ /E
Refresh - Processor Line)
Raw
Card
Version
DIMM
Capacity
DRAM
Device
Technology
DRAM
Organization
# of
DRAM
Devices
# of
Ranks
# of Row/Col
Address Bits
# of Banks
Inside
DRAM
Page
Size
D 16 GB 16 Gb 2048M x 8 9 1 17/10 16 8K
E 32 GB 16 Gb 2048M x 8 18 2 17/10 16 8K
D 24 GB 24 Gb 3072M x 8 9 1 17/10 32 8K
E 48 GB 24 Gb 3072M x 8 18 2 17/10 32 8K
Table 35. Supported DDR4 Memory Down Device Configurations (H/P/U/U Refresh -
Processor Line)
Maximu
m
System
Capacity
3
PKG
Type
(Die bits
x
Package
bits)
DRAM
Organizatio
n / Package
Type
Packag
e
Density
Die
Density
Dies
Per
Channe
l
Rank
Per
Channe
l
PKGs
Per
Channe
l
Physica
l Device
Rank
Banks
Inside
DRAM
Page
Size
32 GB SDP 8x8 1024M x 8 8 Gb 8 Gb 16 2 16 1 16 8K
64 GB SDP 8x8 2048M x 8 16 Gb 16 Gb 16 2 16 1 16 8K
8 GB
SDP
16x16
512M x 16 8 Gb 8 Gb 4 1 4 1 8 8K
16 GB
1
SDP
16x16
1024M x 16 16 Gb 16 Gb 4 1 4 1 8 8K
16 GB DDP 8x16 1024M x 16 16 Gb 8 Gb 8 1 4 1 16 8K
32 GB
2
DDP 8x16 2048M x 16 32 Gb 16 Gb 8 1 4 1 16 8K
Notes: 1. For SDP: 1Rx16 using 16 GB die density - the maximum system capacity is 16 GB
2. For DDP: 1Rx16 using 16 GB die density - the maximum system capacity is 32 GB.
3. Maximum system capacity refer to system with 2 memory controllers populated
R
Memory—Intel
®
Core
™
, Xeon
™
6300 And Xeon
™
E 2400 Processors
13
th
Generation Intel
®
Core
™
, Intel
®
Core
™
14
th
Generation, Intel
®
Core
™
Processor (Series 1) and (Series 2), Intel
®
Xeon
™
E
2400 Processor and Intel
®
Xeon
™
6300 Processor
May 2025 Datasheet, Volume 1 of 2
Doc. No.: 743844, Rev.: 015 117
Table 36. Supported DDR5 Memory Down Device Configurations (H/P/U Refresh -
Processor Line)
Maximum
System
Capacity
2
PKG
Type
(Die bits
x
Package
bits)
DRAM
Organizati
on /
Package
Type
Package
Density
Die
Density
Dies
Per
Channe
l
Rank
Per
Channe
l
PKGs
Per
Channe
l
Physic
al
Device
Rank
Banks
Inside
DRAM
Page
Size
32 GB SDP 8x8 2048M x 8 16 Gb 16 Gb 8 1 8 1 16 8K
16 GB
1
SDP
16x16
1024M x 16 16 Gb 16 Gb 4 1 4 1 8 8K
48 GB
3
SDP 8x8 2048M x 8 24 Gb 24 Gb 8 1 8 1 32 8K
24 GB
3
SDP
16x16
1024M x 16 24 Gb 24 Gb 4 1 4 1 16 8K
Notes: 1. For SDP: 1Rx16 using 16 GB die density - the maximum system capacity is 16 GB
2. Maximum system capacity, refer to system with 2 memory controllers populated
Table 37. Supported LPDDR4x x32 DRAMs Configurations (H/P/U/U Refresh -
Processor Line)
Maximum System
Capacity
3
PKG
Type
(Die bits per Ch x PKG bits)
2
Die Density PKG Density Rank Per PKGs
8 GB DDP 16x32 8 Gb 16 Gb 1
16 GB QDP 16x32 8 Gb 32 Gb 2
32 GB ODP 16x32(Byte mode) 8 Gb 64 Gb 2
16 GB QDP 16x32 16 Gb 32 Gb 1
32 GB ODP 16x32 16 Gb 64 Gb 2
Notes: 1. x32 BGA devices are 200 balls
2. QDP - Quad Die Package, ODP - Octal Die Package, DDP - Dual Die Package
3. Maximum system capacity refers to system with all 8 sub-channels populated
Table 38. Supported LPDDR4x x64 DRAMs Configurations (P/U/U Refresh - Processor
Line)
Maximum
System
Capacity
2
PKG Type
(Die bits per
Ch x PKG
bits)
Die Density
Ball Count
Per PKG
PKG Density
Processor
Line
Rank Per
PKGs
8 GB QDP 16x64 8 Gb 432 32 Gb P/U 1
16 GB ODP 16x64 8 Gb 432 64 Gb P/U 2
16 GB QDP 16x64 16 Gb 432 64 Gb P/U 2
8 GB QDP 16x64 8 Gb 556 32 Gb U 1
16 GB ODP 16x64 8 Gb 556 64 Gb U 2
16 GB QDP 16x64 16 Gb 556 64 Gb U 2
Notes: 1. QDP - Quad Die Package, ODP - Octal Die Package
2. Maximum system capacity refers to system with all 8 sub-channels populated
R
Intel
®
Core
™
, Xeon
™
6300 And Xeon
™
E 2400 Processors—Memory
13
th
Generation Intel
®
Core
™
, Intel
®
Core
™
14
th
Generation, Intel
®
Core
™
Processor (Series 1) and (Series 2), Intel
®
Xeon
™
E
2400 Processor and Intel
®
Xeon
™
6300 Processor
Datasheet, Volume 1 of 2 May 2025
118 Doc. No.: 743844, Rev.: 015
Table 39. Supported LPDDR5/x x32 DRAMs Configurations (H/P/PX/U/U Refresh -
Processor Line)
Maximum System
Capacity
3
PKG
Type
(Die bits per Ch x PKG bits)
2
Die Density PKG Density Rank Per PKGs
12 GB
4
DDP 16x32 12 Gb 24 Gb 1
24 GB
4
QDP 16x32 12 Gb 48 Gb 2
16 GB DDP 16x32 16 Gb 32 Gb 1
32 GB QDP 16x32 16 Gb 64 Gb 2
64 GB
4
ODP 16x32 16 Gb 128 Gb 2
8 GB DDP 16x32 8 Gb 16 Gb 1
16 GB QDP 16x32 8 Gb 32 Gb 2
32 GB ODP 16x32 8 Gb 64 Gb 2
Notes: 1. x32 BGA devices are 315 balls
2. QDP - Quad Die Package, ODP - Octal Die Package, DDP - Dual Die Package
3. Maximum system capacity refers to system with all 8 sub-channels populated
4. Pending DRAM samples availability.
Table 40. Supported LPDDR5/x x64 DRAMs Configurations (P/PX/U/U Refresh -
Processor Line)
Maximum System
Capacity
2
PKG
Type
(Die bits per Ch x PKG
bits)
Die Density PKG Density Rank Per PKGs
16 GB QDP 16x64 16 Gb 64 Gb 1
32 GB ODP 16x64 16 Gb 128 Gb 2
8 GB QDP 16x64 8 Gb 32 Gb 1
16 GB ODP 16x64 8 Gb 64 Gb 2
Notes: 1. QDP - Quad Die Package, ODP - Octal Die Package
2. Maximum system capacity refers to system with all 8 sub-channels populated
System Memory Timing Support
The IMC supports the following DDR Speed Bin, CAS Write Latency (CWL), and
command signal mode timings on the main memory interface:
• tCL = CAS Latency
• tRCD = Activate Command to READ or WRITE Command delay
• tRP = PRECHARGE Command Period
• tRPb = per-bank PRECHARGE time
• tRPab = all-bank PRECHARGE time
• CWL = CAS Write Latency
• Command Signal modes:
— 2N indicates a new DDR5/DDR4/LPDDR4x/LPDDR5/x command may be issued
every 2 clocks
— 1N indicates a new DDR5/DDR4/LPDDR4x/LPDDR5/x command may be issued
every clock.
5.1.3
R
Memory—Intel
®
Core
™
, Xeon
™
6300 And Xeon
™
E 2400 Processors
13
th
Generation Intel
®
Core
™
, Intel
®
Core
™
14
th
Generation, Intel
®
Core
™
Processor (Series 1) and (Series 2), Intel
®
Xeon
™
E
2400 Processor and Intel
®
Xeon
™
6300 Processor
May 2025 Datasheet, Volume 1 of 2
Doc. No.: 743844, Rev.: 015 119