743844-015.pdf - 第80页

Table 11. Assured Power (cTDP) Modes Mode Description Processor Base Power (a.k.a TDP) The time-aver aged power dissipation that the processor is validated to not exceed during manufacturing while executing an Intel-spec…

• The Psys signal and associated power limits / Tau are optional for the system

designer and disabled by default.

• The Psys data will not include power consumption for charging.

• The Intel Dynamic Tuning (DTT) is recommended for performance improvement in

mobile platforms. Dynamic Tuning is configured by system manufacturers

dynamically optimizing the processor power based on the current platform thermal

and power delivery conditions. Contact Intel Representatives for enabling details.

Turbo Time Parameter (Tau)

Turbo Time Parameter (Tau) is a mathematical parameter (units of seconds) that

controls the Intel

Turbo Boost Technology 2.0 algorithm. During a maximum power

turbo event, the processor could sustain PL2 for a duration longer than the Turbo Time

Parameter. If the power value and/or Turbo Time Parameter is changed during

runtime, it may take some time based on the new Turbo Time Parameter level for the

algorithm to settle at the new control limits. The time varies depending on the

magnitude of the change, power limits and other factors. There is an individual Turbo

Time Parameter associated with Package Power Control and Platform Power Control.

Assured Power (cTDP)

Assured Power (cTDP) form a design option where the processor's behavior and

package Processor Base Power (a.k.a TDP) are dynamically adjusted to a desired

system performance and power envelope. Assured Power (cTDP) and Low-Power Mode

technologies offer opportunities to differentiate system design while running active

workloads on select processor SKUs through scalability, configuration and adaptability.

The scenarios or methods by which each technology is used are customizable but

typically involve changes to PL1 and associated frequencies for the scenario with a

resultant change in performance depending on system's usage. Either technology can

be triggered by (but are not limited to) changes in OS power policies or hardware

events such as docking a system, flipping a switch or pressing a button. Assured

Power (cTDP) is designed to be configured dynamically and do not require an

operating system reboot.

NOTE

Assured Power (cTDP) is not battery life improvement technologies.

Assured Power (cTDP)

NOTE

Assured Power (cTDP) availability may vary between the different SKUs.

With Assured Power (cTDP), the processor is capable of altering the maximum

sustained power with an alternate processor IA core base frequency. Assured Power

(cTDP) allows operation in situations where extra cooling is available or situations

where a cooler and quieter mode of operation is desired.

cTDP consists of three modes as shown in the following table.

4.1.1.3

4.1.2

4.1.2.1

Thermal Management—Intel

Core

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, Xeon

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6300 And Xeon

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E 2400 Processors

Generation Intel

Core

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, Intel

Core

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Generation, Intel

Core

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Processor (Series 1) and (Series 2), Intel

Xeon

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2400 Processor and Intel

Xeon

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6300 Processor

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Table 11. Assured Power (cTDP) Modes

Mode Description

Processor Base

Power (a.k.a TDP)

The time-averaged power dissipation that the processor is validated to not exceed

during manufacturing while executing an Intel-specified high complexity workload at

Base Frequency and at the maximum junction temperature for the SKU segment and

configuration. Refer Processor Line Thermal and Power Specifications on page 101

Note: The System on Chip processor integrates multiple compute cores and I/O on a

single package. Platform support for specific usage experiences may require additional

concurrency power to be considered when designing the power delivery and thermal

sustained system capability.

Maximum Assured

Power (cTDP-Up)

Maximum Assured Power ( a.k.a cTDP UP) is a specific processor IA core option, where

manufacturing confirms logical functionality within the set of operating condition limits

specified for the SKU segment.

Refer Processor Line Thermal and Power Specifications on page 101. The Maximum

Assured Power (a.k.a cTDP-Up) Frequency and corresponding Processor Base Power is

higher than the processor IA core Base Frequency and SKU Segment Base on the

Processor Base Power.

Minimum Assured

Power (cTDP-

Down)

Minimum Assured Power ( a.k.a cTDP Down) is a specific processor IA core option,

where manufacturing confirms logical functionality within the set of operating condition

limits specified for the SKU segment.

Refer Processor Line Thermal and Power Specifications on page 101. The Minimum

Assured Power (a.k.a cTDP-Down) Frequency and corresponding Processor Base Power

(a.k.a TDP) is lower than the processor IA core Base Frequency and SKU Segment

Processor Base Power.

In each mode, the Intel

Turbo Boost Technology 2.0 power limits are reprogrammed

along with a new OS controlled frequency range. The Intel Dynamic Tuning driver

assists in Processor Base Power (a.k.a TDP) operation by adjusting processor PL1

dynamically. The Assured Power (cTDP) mode does not change the maximum per-

processor IA core turbo frequency.

Thermal Management Features

Occasionally the processor may operate in conditions that are near to its maximum

operating temperature. This can be due to internal overheating or overheating within

the platform. In order to protect the processor and the platform from thermal failure,

several thermal management features exist to reduce package power consumption

and thereby temperature in order to remain within normal operating limits.

Furthermore, the processor supports several methods to reduce memory power.

Adaptive Thermal Monitor

The purpose of the Adaptive Thermal Monitor is to reduce processor IA core power

consumption and temperature until it operates below its maximum operating

temperature. Processor IA core power reduction is achieved by:

• Adjusting the operating frequency (using the processor IA core ratio multiplier)

and voltage.

• Modulating (starting and stopping) the internal processor IA core clocks (duty

cycle).

The Adaptive Thermal Monitor can be activated when the package temperature,

monitored by any Digital Thermal Sensor (DTS), meets its maximum operating

temperature. The maximum operating temperature implies maximum junction

temperature Tj

MAX

4.1.3

4.1.3.1

Intel

Core

™

, Xeon

™

6300 And Xeon

™

E 2400 Processors—Thermal Management

Generation Intel

Core

™

, Intel

Core

™

Generation, Intel

Core

™

Processor (Series 1) and (Series 2), Intel

Xeon

™

2400 Processor and Intel

Xeon

™

6300 Processor

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Reaching the maximum operating temperature activates the Thermal Control Circuit

(TCC). When activated the TCC causes both the processor IA core and graphics core to

reduce frequency and voltage adaptively. The Adaptive Thermal Monitor will remain

active as long as the package temperature remains at its specified limit. Therefore,

the Adaptive Thermal Monitor will continue to reduce the package frequency and

voltage until the TCC is de-activated.

MAX

is factory calibrated and is not user configurable. The default value is software

visible in the TEMPERATURE_TARGET (0x1A2) MSR, bits [23:16].

The Adaptive Thermal Monitor does not require any additional hardware, software

drivers, or interrupt handling routines. It is not intended as a mechanism to maintain

processor thermal control to PL1 = Processor Base Power. The system design should

provide a thermal solution that can maintain normal operation when PL1 = Processor

Base Power within the intended usage range.

Adaptive Thermal Monitor protection is always enabled.

TCC Activation Offset

TCC Activation Offset can be set as an offset from TjMAX to lower the onset of TCC

and Adaptive Thermal Monitor. In addition, there is an optional time window (Tau) to

manage processor performance at the TCC Activation offset value via an EWMA

(Exponential Weighted Moving Average) of temperature.

TCC Activation Offset with Tau=0

An offset (degrees Celsius) can be written to the TEMPERATURE_TARGET (0x1A2)

MSR, bits [29:24], the offset value will be subtracted from the value found in bits

[23:16]. When the time window (Tau) is set to zero, there will be no averaging, the

offset, will be subtracted from the TjMAX value and used as a new maximum

temperature set point for Adaptive Thermal Monitoring. This will have the same

behavior as in prior products to have TCC activation and Adaptive Thermal Monitor to

occur at this lower target silicon temperature.

If enabled, the offset should be set lower than any other passive protection such as

ACPI _PSV trip points

TCC Activation Offset with Tau

To manage the processor with the EWMA (Exponential Weighted Moving Average) of

temperature, an offset (degrees Celsius) is written to the TEMPERATURE_TARGET

(0x1A2) MSR, bits [29:24], and the time window (Tau) is written to the

TEMPERATURE_TARGET (0x1A2) MSR [6:0]. The Offset value will be subtracted from

the value found in bits [23:16] and be the temperature.

The processor will manage to this average temperature by adjusting the frequency of

the various domains. The instantaneous Tj can briefly exceed the average

temperature. The magnitude and duration of the overshoot is managed by the time

window value (Tau).

This averaged temperature thermal management mechanism is in addition, and not

instead of TjMAX thermal management. That is, whether the TCC activation offset is 0

or not, TCC Activation will occur at TjMAX.

Frequency / Voltage Control

Thermal Management—Intel

Core

™

, Xeon

™

6300 And Xeon

™

E 2400 Processors

Generation Intel

Core

™

, Intel

Core

™

Generation, Intel

Core

™

Processor (Series 1) and (Series 2), Intel

Xeon

™

2400 Processor and Intel

Xeon

™

6300 Processor

May 2025 Datasheet, Volume 1 of 2

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