743844-015.pdf - 第138页
Table 50. PCIe via USB4 Configuration USB4 IPs USB4_PCIe PX Processor Line USB-C* Ports USB4_DMA0 USB4_PCIE0 TCP0 USB4_PCIE1 TCP1 USB4_DMA1 USB4_PCIE2 TCP2 USB4_PCIE3 N/A USB-C Sub-System Display Interface Refer Displa y…
USB-C Sub-system xHCI/xDCI Controllers
The processor supports xHCI/xDCI controllers. The native USB 3 path proceeds from
the memory directly to PHY.
USB 3 Controllers
Extensible Host Controller Interface (xHCI)
Extensible Host Controller Interface (xHCI) is an interface specification that defines
Host Controller for a universal Serial Bus (USB 3), which is capable of interfacing with
USB 1.x, 2.0, and 3.x compatible devices.
In case that a device (example, USB3 mouse) was connected to the computer, the
computer will work as Host and the xHCI will be activated inside the CPU.
The xHCI controller support link rate of up to USB 3.2 Gen 2x2 (2x10G).
Extensible Device Controller Interface (xDCI)
Extensible Device Controller Interface (xDCI) is an interface specification that defines
Device Controller for a universal Serial Bus (USB 3), which is capable of interfacing
with USB 1.x, 2.0, and 3.x compatible devices.
In case that the computer is connected as a device (example, tablet connected to
desktop) to another computer then the xDCI controller will be activated inside the
device and will talk to the Host at the other computer.
The xDCI controller support link rate of up to USB 3.2 Gen 1x1 (5G).
NOTE
These controllers are instantiated in the processor die as a separate PCI function
functionality for the USB-C* capable ports.
USB-C Sub-System PCIe Interface
Table 49. PCIe via USB4 Configuration
USB4 IPs USB4_PCIe
P/H/U/U Refresh Processor Line
USB-C* Ports
USB4_DMA0
USB4_PCIE0 TCP0
USB4_PCIE1 TCP1
USB4_DMA1
USB4_PCIE2 TCP2
USB4_PCIE3 TCP3
6.3
6.3.1
6.3.2
R
USB-C* Sub System—Intel
®
Core
™
, Xeon
™
6300 And Xeon
™
E 2400 Processors
13
th
Generation Intel
®
Core
™
, Intel
®
Core
™
14
th
Generation, Intel
®
Core
™
Processor (Series 1) and (Series 2), Intel
®
Xeon
™
E
2400 Processor and Intel
®
Xeon
™
6300 Processor
May 2025 Datasheet, Volume 1 of 2
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Table 50. PCIe via USB4 Configuration
USB4 IPs USB4_PCIe PX Processor Line USB-C* Ports
USB4_DMA0
USB4_PCIE0 TCP0
USB4_PCIE1 TCP1
USB4_DMA1
USB4_PCIE2 TCP2
USB4_PCIE3 N/A
USB-C Sub-System Display Interface
Refer Display on page 153.
6.4
R
Intel
®
Core
™
, Xeon
™
6300 And Xeon
™
E 2400 Processors—USB-C* Sub System
13
th
Generation Intel
®
Core
™
, Intel
®
Core
™
14
th
Generation, Intel
®
Core
™
Processor (Series 1) and (Series 2), Intel
®
Xeon
™
E
2400 Processor and Intel
®
Xeon
™
6300 Processor
Datasheet, Volume 1 of 2 May 2025
138 Doc. No.: 743844, Rev.: 015
7.0 PCIe* Interface
This chapter provides information on the PCIe* Interface.
Processor PCI Express* Interface
This section describes the PCI Express* interface capabilities of the processor. Refer to
PCI Express Base* Specification 5.0 for details on PCI Express*.
NOTE
PCIe Gen 5.0 is not supported on P/PX/U Processor Lines. The below applies for PCIe
Gen4.0 and lower
PCI Express* Support
The S/S Refresh/E/E Refresh processor PCI Express* has two interfaces:
• 16-lane (x16) port supporting PCIE to gen 5.0 or below that can also be
configured as multiple ports at narrower widths.
• 4-lane (x4) port supporting PCIE gen 4.0 or below.
The HX/HX Refresh processor line PCI Express* has two interfaces:
• 16-lane (x16) port supporting PCIE to gen 5.0 or below that can also be
configured as multiple ports at narrower widths.
• 4-lane (x4) port supporting PCIE gen 4.0 or below.
The H/H Refresh processor line PCI Express* has three interfaces:
• One 8-lane (x8) port supporting PCIE to gen 5.0 or below. This interface is
available on certain SKU
• Two 4-lane (x4) port supporting PCIE gen 4.0 or below.
The PX processor line PCI Express* has two interfaces:
• One 8-lane (x8) port supporting PCIE to gen 4.0 or below. This interface is
available on certain SKU
• One 4-lane (x4) port supporting PCIE gen 4.0 or below.
The P processor line PCI Express* has two interfaces:
• Two 4-lane (x4) port supporting PCIE gen 4.0 or below.
The U/U Refresh processor line PCI Express* has two interfaces:
• Two 4-lane (x4) port supporting PCIE gen 4.0 or below.
The processor supports the following:
7.1
7.1.1
R
PCIe* Interface—Intel
®
Core
™
, Xeon
™
6300 And Xeon
™
E 2400 Processors
13
th
Generation Intel
®
Core
™
, Intel
®
Core
™
14
th
Generation, Intel
®
Core
™
Processor (Series 1) and (Series 2), Intel
®
Xeon
™
E
2400 Processor and Intel
®
Xeon
™
6300 Processor
May 2025 Datasheet, Volume 1 of 2
Doc. No.: 743844, Rev.: 015 139