743844-015.pdf - 第84页

The error associated with DT S measurements will not exceed ±5 °C within the entire operating r ange. Fan Speed Control with Digital Thermal Sensor Digital Thermal Sensor based fan speed control (T F AN ) is a recommende…

Thermal Throttling

As the processor approaches TJMax a throttling mechanisms will engage to protect the

processor from over-heating and provide control thermal budgets.

Achieving this is done by reducing IA and other subsystem agent's voltages and

frequencies in a gradual and coordinated manner that varies depending on the

dynamics of the situation. IA frequencies and voltages will be directed down as low as

LFM (Lowest Frequency Mode). In rare extreme conditions the processor may slow

down IO operations to prevent shutdown.

Further restricts are possible via Thermal Trolling point (TT1) under conditions where

thermal budget cannot be re-gained fast enough with voltages and frequencies

reduction alone. TT1 keeps the same processor voltage and clock frequencies the

same yet skips clock edges to produce effectively slower clocking rates. This will

effectively result in observed frequencies below LFM on the Windows PERF monitor.

Digital Thermal Sensor

Each processor has multiple on-die Digital Thermal Sensor (DTS) that detects the

processor IA, GT and other areas of interest instantaneous temperature.

Temperature values from the DTS can be retrieved through:

• A software interface using processor Model Specific Register (MSR).

• A processor hardware interface.

When the temperature is retrieved by the processor MSR, it is the instantaneous

temperature of the given DTS. When the temperature is retrieved using PECI, it is the

average of the highest DTS temperature in the package over a 256 ms time window.

Intel recommends using the PECI reported temperature for platform thermal control

that benefits from averaging, such as fan speed control. The average DTS temperature

may not be a good indicator of package Adaptive Thermal Monitor activation or rapid

increases in temperature that triggers the Out of Specification status bit within the

PACKAGE_THERM_STATUS (0x1B1) MSR and IA32_THERM_STATUS (0x19C) MSR.

Code execution is halted in C1 or deeper C-states. Package temperature can still be

monitored through PECI in lower C-states.

Unlike traditional thermal devices, the DTS outputs a temperature relative to the

maximum supported operating temperature of the processor (Tj

MAX

), regardless of

TCC activation offset. It is the responsibility of software to convert the relative

temperature to an absolute temperature. The absolute reference temperature is

readable in the TEMPERATURE_TARGET (0x1A2) MSR. The temperature returned by

the DTS is an implied negative integer indicating the relative offset from Tj

MAX

. The

DTS does not report temperatures greater than Tj

MAX

. The DTS-relative temperature

readout directly impacts the Adaptive Thermal Monitor trigger point. When a package

DTS indicates that it has reached the TCC activation (a reading of 0x0, except when

the TCC activation offset is changed), the TCC will activate and indicate an Adaptive

Thermal Monitor event. A TCC activation will lower both processor IA core and

graphics core frequency, voltage, or both. Changes to the temperature can be

detected using two programmable thresholds located in the processor thermal MSRs.

These thresholds have the capability of generating interrupts using the processor IA

core's local APIC. Refer to the Intel 64 Architectures Software Developer’s Manual for

specific register and programming details.

Digital Thermal Sensor Accuracy (T_accuracy)

4.1.3.2

Thermal Management—Intel

Core

™

, Xeon

™

6300 And Xeon

™

E 2400 Processors

Generation Intel

Core

™

, Intel

Core

™

Generation, Intel

Core

™

Processor (Series 1) and (Series 2), Intel

Xeon

™

2400 Processor and Intel

Xeon

™

6300 Processor

May 2025 Datasheet, Volume 1 of 2

Doc. No.: 743844, Rev.: 015 83

The error associated with DTS measurements will not exceed ±5 °C within the entire

operating range.

Fan Speed Control with Digital Thermal Sensor

Digital Thermal Sensor based fan speed control (T

FAN

) is a recommended feature to

achieve optimal thermal performance. At the T

FAN

temperature, Intel recommends full

cooling capability before the DTS reading reaches Tj

MAX

PROCHOT# Signal

The PROCHOT# (processor hot) signal is asserted by the processor when the TCC is

active. Only a single PROCHOT# pin exists at a package level. When any DTS

temperature reaches the TCC activation temperature, the PROCHOT# signal will be

asserted. PROCHOT# assertion policies are independent of Adaptive Thermal Monitor

enabling.

The PROCHOT# signal can be configured to the following modes:

• Input Only: PROCHOT is driven by an external device.

• Output Only: PROCHOT is driven by processor.

• Bi-Directional: Both Processor and external device can drive PROCHOT signal

PROCHOT Input Only

The PROCHOT# signal should be set to input only by default. In this state, the

processor will only monitor PROCHOT# assertions and respond by setting the

maximum frequency to 10Khz.

The following two features are enabled when PROCHOT is set to Input only:

• Fast PROCHOT: Respond to PROCHOT# within 1uS of PROCHOT# pin assertion,

reducing the processor power.

• PROCHOT Demotion Algorithm: designed to improve system performance

during multiple PROCHOT assertions.

Figure 18. PROCHOT Demotion Description

X GHz

IA CLK

Dilution

LFM X GHz

X GHzX GHz X GHz X GHz (X-1) GHz (X-2) GHz

LFM LFM LFM LFM LFM LFM

X : IA high frequency (SKU dependent)

PROCHOT /

Core frequency

IA freq

Max Prochot

Frequency 10 kHz

PROCHOT Output Only

Legacy state, PROCHOT is driven by the processor to external device.

4.1.3.3

4.1.3.4

Intel

Core

™

, Xeon

™

6300 And Xeon

™

E 2400 Processors—Thermal Management

Generation Intel

Core

™

, Intel

Core

™

Generation, Intel

Core

™

Processor (Series 1) and (Series 2), Intel

Xeon

™

2400 Processor and Intel

Xeon

™

6300 Processor

Datasheet, Volume 1 of 2 May 2025

84 Doc. No.: 743844, Rev.: 015

Bi-Directional PROCHOT#

By default, the PROCHOT# signal is set to input only. When configured as an input or

bi-directional signal, PROCHOT# can be used for thermally protecting other platform

components should they overheat as well. When PROCHOT# is driven by an external

device:

• The package will immediately transition to the lowest P-State (Pn) supported by

the processor IA cores and graphics cores. This is contrary to the internally-

generated Adaptive Thermal Monitor response.

• Clock modulation is not activated.

The processor package will remain at the lowest supported P-state until the system

de-asserts PROCHOT#. The processor can be configured to generate an interrupt upon

assertion and de-assertion of the PROCHOT# signal. Refer to the appropriate

processor family BIOS Specification for specific register and programming details.

When PROCHOT# is configured as a bi-directional signal and PROCHOT# is asserted

by the processor, it is impossible for the processor to detect a system assertion of

PROCHOT#. The system assertion will have to wait until the processor de-asserts

PROCHOT# before PROCHOT# action can occur due to the system assertion. While the

processor is hot and asserting PROCHOT#, the power is reduced but the reduction rate

is slower than the system PROCHOT# response of < 100 us. The processor thermal

control is staged in smaller increments over many milliseconds. This may cause

several milliseconds of delay to a system assertion of PROCHOT# while the output

function is asserted.

PROCHOT Demotion Algorithm

PROCHOT demotion algorithm is designed to improve system performance following

multiple Platform PROCHOT consecutive assertions. During each PROCHOT assertion

processor will eventually transition to the lowest P-State (Pn) supported by the

processor IA cores and graphics cores (LFM). When detecting several PROCHOT

consecutive assertions the processor will reduce the max frequency in order to reduce

the PROCHOT assertions events. The processor will keep reducing the frequency until

no consecutive assertions detected. The processor will raise the frequency if no

consecutive PROCHOT assertion events will occur. PROCHOT demotion algorithm

enabled only when the PROCHOT is configured as input.

NOTE

PROCHOT Demotion Algorithm is enabled by Hardware default only when the

PROCHOT is configured as input. This feature can be disabled through BIOS policy. .

Voltage Regulator Protection using PROCHOT#

PROCHOT# may be used for thermal protection of voltage regulators (VR). System

designers can create a circuit to monitor the VR temperature and assert PROCHOT#

and, if enabled, activate the TCC when the temperature limit of the VR is reached.

When PROCHOT# is configured as a bi-directional or input only signal, if the system

assertion of PROCHOT# is recognized by the processor, results in power reduction.

Power reduction down to LFM and duration of the platform PROCHOT# assertion as

described in paragraph 4.1.3.6. supported by the processor IA cores and graphics

cores. Systems should still provide proper cooling for the VR and rely on bi-directional

PROCHOT# only as a backup in case of system cooling failure. Overall, the system

4.1.3.5

4.1.3.6

4.1.3.7

Thermal Management—Intel

Core

™

, Xeon

™

6300 And Xeon

™

E 2400 Processors

Generation Intel

Core

™

, Intel

Core

™

Generation, Intel

Core

™

Processor (Series 1) and (Series 2), Intel

Xeon

™

2400 Processor and Intel

Xeon

™

6300 Processor

May 2025 Datasheet, Volume 1 of 2

Doc. No.: 743844, Rev.: 015 85