743844-015.pdf - 第221页
Byte3 Byte2 Byte1 Byte0 Address Card-bus CIS Pointer 28h Subsystem ID Subsystem Vendor ID 2Ch Expansion ROM Base Address 30h Reserved Capabilities Pointer 34h Reserved 38h Maximum Latency Minimum Grant Interrupt Pin Inte…
NOTES
• The Extended Family, Bits [27:20] are used in conjunction with the Family Code,
specified in Bits[11:8], to indicate whether the processor belongs to Intel
®
Core
™
processor family.
• The Extended Model, Bits [19:16] in conjunction with the Model Number, specified
in Bits [7:4], are used to identify the model of the processor within the processor's
family.
• The Family Code corresponds to Bits [11:8] of the EDX register after RESET, Bits
[11:8] of the EAX register after the CPUID instruction is executed with a 1 in the
EAX register, and the generation field of the Device ID register accessible through
Boundary Scan.
• The Model Number corresponds to Bits [7:4] of the EDX register after RESET, Bits
[7:4] of the EAX register after the CPUID instruction is executed with a 1 in the
EAX register, and the model field of the Device ID register accessible through
Boundary Scan.
• The Stepping ID in Bits [3:0] indicates the revision number of that model.
• When EAX is initialized to a value of '1', the CPUID instruction returns the
Extended Family, Extended Model, Processor Type, Family Code, Model Number
and Stepping ID value in the EAX register. Note that the EDX processor signature
value after reset is equivalent to the processor signature output value in the EAX
register.
Cache and TLB descriptor parameters are provided in the EAX, EBX, ECX and EDX
registers after the CPUID instruction is executed with a 2 in the EAX register.
PCI Configuration Header
Every PCI-compatible function has a standard PCI configuration header, as shown in
the table below. This includes mandatory registers (Bold) to determine which driver to
load for the device. Some of these registers define ID values for the PCI function,
which are described in this chapter.
Table 102. PCI Configuration Header
Byte3 Byte2 Byte1 Byte0 Address
Device ID Vendor ID (0x8086) 00h
Status Command 04h
Class Code Revision ID 08h
BIST Header Type Latency Timer Cache Line Size 0Ch
Base Address Register0 (BAR0) 10h
Base Address Register1 (BAR1) 14h
Base Address Register2 (BAR2) 18h
Base Address Register3 (BAR3) 1Ch
Base Address Register4 (BAR4) 20h
Base Address Register5 (BAR5) 24h
continued...
15.2
R
Intel
®
Core
™
, Xeon
™
6300 And Xeon
™
E 2400 Processors—CPU And Device IDs
13
th
Generation Intel
®
Core
™
, Intel
®
Core
™
14
th
Generation, Intel
®
Core
™
Processor (Series 1) and (Series 2), Intel
®
Xeon
™
E
2400 Processor and Intel
®
Xeon
™
6300 Processor
Datasheet, Volume 1 of 2 May 2025
220 Doc. No.: 743844, Rev.: 015
Byte3 Byte2 Byte1 Byte0 Address
Card-bus CIS Pointer 28h
Subsystem ID Subsystem Vendor ID 2Ch
Expansion ROM Base Address 30h
Reserved
Capabilities
Pointer
34h
Reserved 38h
Maximum Latency Minimum Grant Interrupt Pin Interrupt Line 3Ch
Device IDs
This section specifies the device IDs of the processor.
Table 103. Host Device ID (DID0)
Platform Device ID
S/S Refresh 8P+16E 0xA700
S 8P+8E 0xA703
S/S Refresh 6P+8E 0xA704
S/S Refresh 6P+4E 0xA705
S/S Refresh 6P+8E 0x4640
S/S Refresh 6P+4E 0x4648
S/S Refresh 4P+0E 0x4630
S Refresh 8P+12E 0xA740
S Refresh 2P+0E 0x4610
HX/HX Refresh 8P+16E 0xA702
HX/HX Refresh 8P+12E 0xA729
HX/HX Refresh 8P+8E 0xA728
HX/HX Refresh 6P+8E 0xA72A
HX/HX Refresh 6P+4E 0xA719
HX 8P+8E 0x4637
HX 6P+8E 0x463B
HX 6P+4E 0x4647
H/H Refresh 6P+8E 0xA706
H/H Refresh 4P+8E 0xA707
H/H Refresh 6P+4E 0xA715
H/H Refresh 4P+4E 0xA716
P 6P+8E 0xA706
P 4P+8E 0xA707
PX 6P+8E 0xA709
continued...
15.3
R
CPU And Device IDs—Intel
®
Core
™
, Xeon
™
6300 And Xeon
™
E 2400 Processors
13
th
Generation Intel
®
Core
™
, Intel
®
Core
™
14
th
Generation, Intel
®
Core
™
Processor (Series 1) and (Series 2), Intel
®
Xeon
™
E
2400 Processor and Intel
®
Xeon
™
6300 Processor
May 2025 Datasheet, Volume 1 of 2
Doc. No.: 743844, Rev.: 015 221
Platform Device ID
PX 4P+8E 0xA70A
U/U Refresh 2P+8E 0xA708
U/U Refresh 2P+4E 0xA71B
U 1P+4E 0xA71C
E/E Refresh 8P + 0E 0xA711
E/E Refresh 6P + 0E 0xA712
/E Refresh E 4P + 0E 0xA713
Table 104. Graphics Device ID (DID2)
SKU Processor
Step
GT SKU Device 2 ID Device 2 Rev
S 8P+16E B-0 16EU 0xA783 4
S/S Refresh 8P+16E B-0 32EU 0xA780 4
S Refresh 8P+12E B-0 32EU 0xA780 4
S 8P+8E B-0 32EU 0xA780 4
S/S Refresh 6P+8E B-0 32EU 0xA780 4
S 6P+8E B-0 32EU 0xA780 4
S/S Refresh 6P+4E B-0 24EU 0xA782 4
S 4P+0E C-0 24EU 0x4692 12
S Refresh 2P+0E H-0 16EU 0x4693 12
S 6P+8E C-0 32EU 0x4680 12
S/S Refresh 6P+4E C-0 24EU 0x4682 12
HX/HX Refresh 8P+16E B-0 32EU 0xA788 4
HX/HX Refresh 8P+12E B-0 32EU 0xA788 4
HX /HX Refresh 8P+8E B-0 32EU 0xA788 4
HX Refresh 8P+8E B-0 16EU 0xA78B 4
HX 6P+8E B-0 16EU 0xA78B 4
HX Refresh 6P+8E B-0 32EU 0xA788 4
HX/HX Refresh 6P+4E B-0 16EU 0xA78B 4
HX 8P+8E C-0 32EU 0x4688 12
HX 6P+8E C-0 32EU 0x4688 12
HX 6P+8E C-0 16EU 0x468B 12
HX 6P+4E C-0 16EU 0x468B 12
H 6P+8E J-0 96EU 0xA7A0 0
H 6P+4E J-0 64EU 0xA7A8 0
H 4P+8E J-0 80EU 0xA7A0 0
H Refresh 6P+8E J-0 96EU 0xA7AA 0
continued...
R
Intel
®
Core
™
, Xeon
™
6300 And Xeon
™
E 2400 Processors—CPU And Device IDs
13
th
Generation Intel
®
Core
™
, Intel
®
Core
™
14
th
Generation, Intel
®
Core
™
Processor (Series 1) and (Series 2), Intel
®
Xeon
™
E
2400 Processor and Intel
®
Xeon
™
6300 Processor
Datasheet, Volume 1 of 2 May 2025
222 Doc. No.: 743844, Rev.: 015