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Reaching the maximum oper ating temper ature activates the Thermal Control Circuit (TCC). When activ ated the TCC causes both the processor IA core and gr aphics core to reduce frequency and voltage adaptively . The Adap…

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Table 11. Assured Power (cTDP) Modes
Mode Description
Processor Base
Power (a.k.a TDP)
The time-averaged power dissipation that the processor is validated to not exceed
during manufacturing while executing an Intel-specified high complexity workload at
Base Frequency and at the maximum junction temperature for the SKU segment and
configuration. Refer Processor Line Thermal and Power Specifications on page 101
Note: The System on Chip processor integrates multiple compute cores and I/O on a
single package. Platform support for specific usage experiences may require additional
concurrency power to be considered when designing the power delivery and thermal
sustained system capability.
Maximum Assured
Power (cTDP-Up)
Maximum Assured Power ( a.k.a cTDP UP) is a specific processor IA core option, where
manufacturing confirms logical functionality within the set of operating condition limits
specified for the SKU segment.
Refer Processor Line Thermal and Power Specifications on page 101. The Maximum
Assured Power (a.k.a cTDP-Up) Frequency and corresponding Processor Base Power is
higher than the processor IA core Base Frequency and SKU Segment Base on the
Processor Base Power.
Minimum Assured
Power (cTDP-
Down)
Minimum Assured Power ( a.k.a cTDP Down) is a specific processor IA core option,
where manufacturing confirms logical functionality within the set of operating condition
limits specified for the SKU segment.
Refer Processor Line Thermal and Power Specifications on page 101. The Minimum
Assured Power (a.k.a cTDP-Down) Frequency and corresponding Processor Base Power
(a.k.a TDP) is lower than the processor IA core Base Frequency and SKU Segment
Processor Base Power.
In each mode, the Intel
®
Turbo Boost Technology 2.0 power limits are reprogrammed
along with a new OS controlled frequency range. The Intel Dynamic Tuning driver
assists in Processor Base Power (a.k.a TDP) operation by adjusting processor PL1
dynamically. The Assured Power (cTDP) mode does not change the maximum per-
processor IA core turbo frequency.
Thermal Management Features
Occasionally the processor may operate in conditions that are near to its maximum
operating temperature. This can be due to internal overheating or overheating within
the platform. In order to protect the processor and the platform from thermal failure,
several thermal management features exist to reduce package power consumption
and thereby temperature in order to remain within normal operating limits.
Furthermore, the processor supports several methods to reduce memory power.
Adaptive Thermal Monitor
The purpose of the Adaptive Thermal Monitor is to reduce processor IA core power
consumption and temperature until it operates below its maximum operating
temperature. Processor IA core power reduction is achieved by:
Adjusting the operating frequency (using the processor IA core ratio multiplier)
and voltage.
Modulating (starting and stopping) the internal processor IA core clocks (duty
cycle).
The Adaptive Thermal Monitor can be activated when the package temperature,
monitored by any Digital Thermal Sensor (DTS), meets its maximum operating
temperature. The maximum operating temperature implies maximum junction
temperature Tj
MAX
.
4.1.3
4.1.3.1
R
Intel
®
Core
, Xeon
6300 And Xeon
E 2400 Processors—Thermal Management
13
th
Generation Intel
®
Core
, Intel
®
Core
14
th
Generation, Intel
®
Core
Processor (Series 1) and (Series 2), Intel
®
Xeon
E
2400 Processor and Intel
®
Xeon
6300 Processor
Datasheet, Volume 1 of 2 May 2025
80 Doc. No.: 743844, Rev.: 015
Reaching the maximum operating temperature activates the Thermal Control Circuit
(TCC). When activated the TCC causes both the processor IA core and graphics core to
reduce frequency and voltage adaptively. The Adaptive Thermal Monitor will remain
active as long as the package temperature remains at its specified limit. Therefore,
the Adaptive Thermal Monitor will continue to reduce the package frequency and
voltage until the TCC is de-activated.
Tj
MAX
is factory calibrated and is not user configurable. The default value is software
visible in the TEMPERATURE_TARGET (0x1A2) MSR, bits [23:16].
The Adaptive Thermal Monitor does not require any additional hardware, software
drivers, or interrupt handling routines. It is not intended as a mechanism to maintain
processor thermal control to PL1 = Processor Base Power. The system design should
provide a thermal solution that can maintain normal operation when PL1 = Processor
Base Power within the intended usage range.
Adaptive Thermal Monitor protection is always enabled.
TCC Activation Offset
TCC Activation Offset can be set as an offset from TjMAX to lower the onset of TCC
and Adaptive Thermal Monitor. In addition, there is an optional time window (Tau) to
manage processor performance at the TCC Activation offset value via an EWMA
(Exponential Weighted Moving Average) of temperature.
TCC Activation Offset with Tau=0
An offset (degrees Celsius) can be written to the TEMPERATURE_TARGET (0x1A2)
MSR, bits [29:24], the offset value will be subtracted from the value found in bits
[23:16]. When the time window (Tau) is set to zero, there will be no averaging, the
offset, will be subtracted from the TjMAX value and used as a new maximum
temperature set point for Adaptive Thermal Monitoring. This will have the same
behavior as in prior products to have TCC activation and Adaptive Thermal Monitor to
occur at this lower target silicon temperature.
If enabled, the offset should be set lower than any other passive protection such as
ACPI _PSV trip points
TCC Activation Offset with Tau
To manage the processor with the EWMA (Exponential Weighted Moving Average) of
temperature, an offset (degrees Celsius) is written to the TEMPERATURE_TARGET
(0x1A2) MSR, bits [29:24], and the time window (Tau) is written to the
TEMPERATURE_TARGET (0x1A2) MSR [6:0]. The Offset value will be subtracted from
the value found in bits [23:16] and be the temperature.
The processor will manage to this average temperature by adjusting the frequency of
the various domains. The instantaneous Tj can briefly exceed the average
temperature. The magnitude and duration of the overshoot is managed by the time
window value (Tau).
This averaged temperature thermal management mechanism is in addition, and not
instead of TjMAX thermal management. That is, whether the TCC activation offset is 0
or not, TCC Activation will occur at TjMAX.
Frequency / Voltage Control
R
Thermal Management—Intel
®
Core
, Xeon
6300 And Xeon
E 2400 Processors
13
th
Generation Intel
®
Core
, Intel
®
Core
14
th
Generation, Intel
®
Core
Processor (Series 1) and (Series 2), Intel
®
Xeon
E
2400 Processor and Intel
®
Xeon
6300 Processor
May 2025 Datasheet, Volume 1 of 2
Doc. No.: 743844, Rev.: 015 81
Upon Adaptive Thermal Monitor activation, the processor attempts to dynamically
reduce processor temperature by lowering the frequency and voltage operating point.
The operating points are automatically calculated by the processor IA core itself and
do not require the BIOS to program them as with previous generations of Intel
processors. The processor IA core will scale the operating points such that:
The voltage will be optimized according to the temperature, the processor IA core
bus ratio and the number of processor IA cores in deep C-states.
The processor IA core power and temperature are reduced while minimizing
performance degradation.
Once the temperature has dropped below the trigger temperature, the operating
frequency and voltage will transition back to the normal system operating point.
Once a target frequency/bus ratio is resolved, the processor IA core will transition to
the new target automatically.
On an upward operating point transition, the voltage transition precedes the
frequency transition.
On a downward transition, the frequency transition precedes the voltage
transition.
The processor continues to execute instructions. However, the processor will halt
instruction execution for frequency transitions.
If a processor load-based Enhanced Intel SpeedStep Technology/P-state transition
(through MSR write) is initiated while the Adaptive Thermal Monitor is active, there
are two possible outcomes:
If the P-state target frequency is higher than the processor IA core optimized
target frequency, the P-state transition will be deferred until the thermal event has
been completed.
If the P-state target frequency is lower than the processor IA core optimized
target frequency, the processor will transition to the P-state operating point.
Clock Modulation
If the frequency/voltage changes are unable to end an Adaptive Thermal Monitor
event, the Adaptive Thermal Monitor will utilize clock modulation. Clock modulation is
done by alternately turning the clocks off and on at a duty cycle (ratio between clock
“on” time and total time) specific to the processor. The duty cycle is factory configured
to 25% on and 75% off and cannot be modified. The period of the duty cycle is
configured to 32 microseconds when the Adaptive Thermal Monitor is active. Cycle
times are independent of processor frequency. A small amount of hysteresis has been
included to prevent excessive clock modulation when the processor temperature is
near its maximum operating temperature. Once the temperature has dropped below
the maximum operating temperature, and the hysteresis timer has expired, the
Adaptive Thermal Monitor goes inactive and clock modulation ceases. Clock
modulation is automatically engaged as part of the Adaptive Thermal Monitor
activation when the frequency/voltage targets are at their minimum settings.
Processor performance will be decreased when clock modulation is active. Snooping
and interrupt processing are performed in the normal manner while the Adaptive
Thermal Monitor is active.
Clock modulation will not be activated by the Package average temperature control
mechanism.
R
Intel
®
Core
, Xeon
6300 And Xeon
E 2400 Processors—Thermal Management
13
th
Generation Intel
®
Core
, Intel
®
Core
14
th
Generation, Intel
®
Core
Processor (Series 1) and (Series 2), Intel
®
Xeon
E
2400 Processor and Intel
®
Xeon
6300 Processor
Datasheet, Volume 1 of 2 May 2025
82 Doc. No.: 743844, Rev.: 015