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VCCIN Aux IMON CPU strap will be enabled by default for best performance and power . Processor Graphics Power Management Memory Power Savings Technologies Intel ® Rapid Memory Power Management (Intel ® RMPM) Intel ® Rapi…

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Processor deeper Package C-State entry frequency is controlled to minimize platform
energy. When Package C-State Auto-Demotion enabled, a reduced residency in a
deeper Package C-State is expected during system runs with high wake rates.
No change at IDLE scenario power consumption due to this feature. Package C-State
Auto-Demotion is enabled by default and controlled through BIOS menu.
Modern Standby
Modern Standby is a platform state. On display time out the OS requests the
processor to enter package C10 and platform devices at RTD3 (or disabled) in order to
attain low power in idle. Modern Standby requires proper BIOS and OS configuration.
Dynamic LLC Sizing
When all processor IA cores request C8 or deeper C-state, internal heuristics
dynamically flushes the LLC. Once the processor IA cores enter a deep C-state,
depending on their MWAIT sub-state request, the LLC is either gradually flushed N-
ways at a time or flushed all at once. Upon the processor IA cores exiting to C0 state,
the LLC is gradually expanded based on internal heuristics.
Package C-States and Display Resolutions
The integrated graphics engine has the frame buffer located in system memory. When
the display is updated, the graphics engine fetches display data from system memory.
Different screen resolutions and refresh rates have different memory latency
requirements. These requirements may limit the deepest Package C-state the
processor can enter. Other elements that may affect the deepest Package C-state
available are the following:
Display is on or off
Single or multiple displays
Native or non-native resolution
Panel Self Refresh (PSR) technology
NOTE
Display resolution is not the only factor influencing the deepest Package C-state the
processor can get into. Device latencies, interrupt response latencies, and core C-
states are among other factors that influence the final package C-state the processor
can enter.
Processor AUX Power Management
VCCIN AUX IMON Feature
This feature is the new power feature which allows the processor to read VCCIN Aux
average current via the IMVP9.1 controller over SVID.
It allows the processor to get an accurate power estimation of VCCIN Aux, which is
reflected in more accurate package power reporting and better accuracy in meeting
the package power limits (PL1, PL2, and PL3).
3.2.6
3.3
R
Intel
®
Core
, Xeon
6300 And Xeon
E 2400 Processors—Power Management
13
th
Generation Intel
®
Core
, Intel
®
Core
14
th
Generation, Intel
®
Core
Processor (Series 1) and (Series 2), Intel
®
Xeon
E
2400 Processor and Intel
®
Xeon
6300 Processor
Datasheet, Volume 1 of 2 May 2025
70 Doc. No.: 743844, Rev.: 015
VCCIN Aux IMON CPU strap will be enabled by default for best performance and
power.
Processor Graphics Power Management
Memory Power Savings Technologies
Intel
®
Rapid Memory Power Management (Intel
®
RMPM)
Intel
®
Rapid Memory Power Management (Intel
®
RMPM) conditionally places memory
into self-refresh when the processor is in package C3 or deeper power state to allow
the system to remain in the deeper power states longer for memory not reserved for
graphics memory. Intel
®
RMPM functionality depends on graphics/display state
(relevant only when processor graphics is being used), as well as memory traffic
patterns generated by other connected I/O devices.
Display Power Savings Technologies
Intel
®
Seamless Display Refresh Rate Switching Technology (Intel
®
SDRRS
Technology) with eDP* Port
Intel
®
DRRS provides a mechanism where the monitor is placed in a slower refresh
rate (the rate at which the display is updated). The system is smart enough to know
that the user is not displaying either 3D or media like a movie where specific refresh
rates are required. The technology is very useful in an environment such as a plane
where the user is in battery mode doing E-mail, or other standard office applications.
It is also useful where the user may be viewing web pages or social media sites while
in battery mode.
Intel
®
OLED Power Saving Technology (Intel
®
OPST) 1.1
Intel
®
OPST solution uses same HW infrastructure as Intel
®
DPST. Frames are
processed using frame change threshold based interrupt mechanism similar to Intel
®
DPST. Intel
®
OPST SW algorithm determines which pixels in the frame should be
dimmed to save power keeping visual quality (such as contrast, color) impact to
acceptable level. Since there is no backlight for OLED panels, the power savings come
solely from pixel dimming.
Intel
®
Display Power Saving Technology (Intel
®
DPST)
The Intel
®
DPST technique achieves back-light power savings while maintaining a
good visual experience. This is accomplished by adaptively enhancing the displayed
image while decreasing the back-light brightness simultaneously. The goal of this
technique is to provide equivalent end-user-perceived image quality at a decreased
back-light power level.
1. The original (input) image produced by the operating system or application is
analyzed by the Intel
®
DPST subsystem. An interrupt to Intel
®
DPST software is
generated whenever a meaningful change in the image attributes is detected. (A
meaningful change is when the Intel
®
DPST determines if the brightness of the
displaying images and the image enhancement and back-light control needs to be
altered.)
2. Intel
®
DPST subsystem applies an image-specific enhancement to increase image
brightness.
3.4
3.4.1
3.4.2
R
Power Management—Intel
®
Core
, Xeon
6300 And Xeon
E 2400 Processors
13
th
Generation Intel
®
Core
, Intel
®
Core
14
th
Generation, Intel
®
Core
Processor (Series 1) and (Series 2), Intel
®
Xeon
E
2400 Processor and Intel
®
Xeon
6300 Processor
May 2025 Datasheet, Volume 1 of 2
Doc. No.: 743844, Rev.: 015 71
3. A corresponding decrease to the back-light brightness is applied simultaneously to
produce an image with similar user-perceived quality (such as brightness) as the
original image.
Intel
®
DPST 7.1 has improved power savings without adversely affecting the
performance.
NOTE
13
th
Generation Intel
®
Core
processor uses Intel
®
DPST 7.1 while Intel
®
Core
14
th
Generation Processors uses Intel
®
DPST 8.0
Panel Self-Refresh 2 (PSR 2)
Panel Self-Refresh feature allows the Processor Graphics core to enter low-power state
when the frame buffer content is not changing constantly. This feature is available on
panels capable of supporting Panel Self-Refresh. Apart from being able to support, the
eDP* panel should be eDP 1.4 compliant. PSR 2 adds partial frame updates and
requires an eDP 1.4 compliant panel.
Low-Power Single Pipe (LPSP)
Low-power single pipe is a power conservation feature that helps save power by
keeping the inactive pipes powered OFF. LPSP is achieved by keeping a pipe enabled
during eDP* only with minimal display pipeline support.
Low-Power Dual Pipe (LPDP)
This feature is similar to LPSP and is applicable for designs with dual eDP* panels.
Intel
®
Smart 2D Display Technology (Intel
®
S2DDT)
Intel
®
S2DDT reduces display refresh memory traffic by reducing memory reads
required for display refresh. Power consumption is reduced by less accesses to the
IMC. Intel S2DDT is only enabled in single pipe mode.
Intel
®
S2DDT is most effective with:
Display images well suited to compression, such as text windows, slide shows, and
so on. Poor examples are 3D games.
Static screens such as screens with significant portions of the background showing
2D applications, processor benchmarks, and so on, or conditions when the
processor is idle. Poor examples are full-screen 3D games and benchmarks that
flip the display image at or near display refresh rates.
Processor Graphics Core Power Savings Technologies
Intel
®
Graphics Dynamic Frequency
Intel
®
Turbo Boost Technology 2.0 is the ability of the processor IA cores and graphics
(Graphics Dynamic Frequency) cores to opportunistically increase frequency and/or
voltage above the guaranteed processor and graphics frequency for the given part.
Intel
®
Graphics Dynamic Frequency is a performance feature that makes use of
unused package power and thermals to increase application performance. The
increase in frequency is determined by how much power and thermal budget is
available in the package, and the application demand for additional processor or
graphics performance. The processor IA core control is maintained by an embedded
3.4.3
R
Intel
®
Core
, Xeon
6300 And Xeon
E 2400 Processors—Power Management
13
th
Generation Intel
®
Core
, Intel
®
Core
14
th
Generation, Intel
®
Core
Processor (Series 1) and (Series 2), Intel
®
Xeon
E
2400 Processor and Intel
®
Xeon
6300 Processor
Datasheet, Volume 1 of 2 May 2025
72 Doc. No.: 743844, Rev.: 015