743844-015.pdf - 第27页

Term Description EU Ex ecution Unit in the Graphics Processor FIVR Fully Integrated V oltage Regulator GSA Graphics in System Agent GNA Gauss Newton Algorithm HDCP High-Bandwidth Digital Content Protection HDMI* High Def…

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Processor Line
Windows* 11 SV2
(2022 H2)
Windows* 11 SV1
(2021 H2)
Windows* 10
(21H2/22H2)
Linux* OS Chrome* OS
Windows* Server
2022
No (for Windows*10)
E/E Refresh-Processor
Line
No Yes No Yes
Note: Refer to OS vendor site for more information regarding latest OS revision support.
Terminology and Special Marks
Table 2. Terminology
Term Description
4K Ultra High Definition (UHD)
AES Advanced Encryption Standard
AGC Adaptive Gain Control
API Application Programming Interface
AVC Advanced Video Coding
BLT Block Level Transfer
BPP Bits per Pixel
CDR Clock and Data Recovery
CTLE Continuous Time Linear Equalizer
DDC Digital Display Channel
DDI Digital Display Interface for DP or HDMI/DVI
DSI Display Serial Interface
DDR4 Fourth-Generation Double Data Rate SDRAM Memory Technology
DDR5 Fifth-Generation Double Data Rate SDRAM Memory Technology
DPC DIMM per channel
DFE Decision Feedback Equalizer
DMA Direct Memory Access
DPPM Dynamic Power Performance Management
DMI Direct Media Interface
DP* DisplayPort*
DSC Display Stream Compression
DSI Display Serial Interface
DTS Digital Thermal Sensor
ECC Error Correction Code - used to fix DDR transactions errors
eDP* Embedded DisplayPort*
continued...
1.9
R
Intel
®
Core
, Xeon
6300 And Xeon
E 2400 Processors—Introduction
13
th
Generation Intel
®
Core
, Intel
®
Core
14
th
Generation, Intel
®
Core
Processor (Series 1) and (Series 2), Intel
®
Xeon
E
2400 Processor and Intel
®
Xeon
6300 Processor
Datasheet, Volume 1 of 2 May 2025
26 Doc. No.: 743844, Rev.: 015
Term Description
EU Execution Unit in the Graphics Processor
FIVR Fully Integrated Voltage Regulator
GSA Graphics in System Agent
GNA Gauss Newton Algorithm
HDCP High-Bandwidth Digital Content Protection
HDMI* High Definition Multimedia Interface
IMC Integrated Memory Controller
Intel
®
64
Technology
64-bit memory extensions to the IA-32 architecture
Intel
®
DPST Intel
®
Display Power Saving Technology
Intel
®
PTT Intel
®
Platform Trust Technology
Intel
®
TXT Intel
®
Trusted Execution Technology
Intel
®
VT
Intel
®
Virtualization Technology. Processor Virtualization, when used in conjunction
with Virtual Machine Monitor software, enables multiple, robust independent software
environments inside a single platform.
Intel
®
VT-d
Intel
®
Virtualization Technology (Intel
®
VT) for Directed I/O. Intel
®
VT-d is a
hardware assist, under system software (Virtual Machine Manager or OS) control, for
enabling I/O device Virtualization. Intel
®
VT-d also brings robust security by providing
protection from errant DMAs by using DMA remapping, a key feature of Intel
®
VT-d.
ITH Intel
®
Trace Hub
IOV I/O Virtualization
IPU Image Processing Unit
LFM
Low Frequency Mode. corresponding to the Enhanced Intel SpeedStep
®
Technology’s
lowest voltage/frequency pair. It can be read at MSR CEh [47:40].
LLC Last Level Cache
LPSP Low-Power Single Pipe
LSF
Lowest Supported Frequency.This frequency is the lowest frequency where
manufacturing confirms logical functionality under the set of operating conditions.
LTR
The Latency Tolerance Reporting (LTR) mechanism enables Endpoints to report their
service latency requirements for Memory Reads and Writes to the Root Complex, so
that power management policies for central platform resources (such as main
memory, RC internal interconnects, and snoop resources) can be implemented to
consider Endpoint service requirements.
MCP
Multi-Chip Package - includes the processor and the PCH. In some SKUs, it might
have additional On-Package Cache.
MFM
Minimum Frequency Mode. MFM is the minimum ratio supported by the processor and
can be read from MSR CEh [55:48].
MLC Mid-Level Cache
MPEG
Motion Picture Expert Group, international standard body JTC1/SC29/WG11 under
ISO/IEC that has defined audio and video compression standards such as MPEG-1,
MPEG-2, and MPEG-4, etc.
NCTF
Non-Critical to Function. NCTF locations are typically redundant ground or non-critical
reserved balls/lands, so the loss of the solder joint continuity at end of life conditions
will not affect the overall product functionality.
continued...
R
Introduction—Intel
®
Core
, Xeon
6300 And Xeon
E 2400 Processors
13
th
Generation Intel
®
Core
, Intel
®
Core
14
th
Generation, Intel
®
Core
Processor (Series 1) and (Series 2), Intel
®
Xeon
E
2400 Processor and Intel
®
Xeon
6300 Processor
May 2025 Datasheet, Volume 1 of 2
Doc. No.: 743844, Rev.: 015 27
Term Description
PCH
Platform Controller Hub. The chipset with centralized platform capabilities including
the main I/O interfaces along with display connectivity, audio features, power
management, manageability, security, and storage features. The PCH may also be
referred to as “chipset”.
PECI Platform Environment Control Interface
PEG PCI Express* Graphics
PL1, PL2, PL3 Power Limit 1, Power Limit 2, Power Limit 3
PMIC Power Management Integrated Circuit
Processor The 64-bit multi-core component (package)
Processor Core
The term “processor core” refers to the Si die itself, which can contain multiple
execution cores. Each execution core has an instruction cache, data cache, and 256-
KB L2 cache. All execution cores share the LLC.
Processor Graphics Intel
®
Processor Graphics
PSR Panel Self-Refresh
PSx Power Save States (PS0, PS1, PS2, PS3, PS4)
Rank
A unit of DRAM corresponding to four to eight devices in parallel, ignoring ECC. These
devices are usually, but not always, mounted on a single side of a SoDIMM.
SCI System Control Interrupt. SCI is used in the ACPI protocol.
SDP Scenario Design Power
SHA Secure Hash Algorithm
SSC Spread Spectrum Clock
Storage Conditions Refer Package Storage Specifications on page 218.
STR Suspend to RAM
TAC Thermal Averaging Constant
TBT Thunderbolt
Interface
TCC Thermal Control Circuit
Processor Base
Power (a.k.a TDP)
Thermal Design Power
TTV Processor Base
Power (a.k.a TDP)
Thermal Test Vehicle TDP
V
CC
Processor Core Power Supply
V
CCGT
Processor Graphics Power Supply
V
CCSA
System Agent Power Supply
VLD Variable Length Decoding
VPID Virtual Processor ID
V
SS
Processor Ground
D0ix-states
USB controller power states ranging from D0i0 to D0i3, where D0i0 is fully powered
on and D0i3 is primarily powered off. Controlled by SW.
S0ix-states Processor residency idle standby power states.
R
Intel
®
Core
, Xeon
6300 And Xeon
E 2400 Processors—Introduction
13
th
Generation Intel
®
Core
, Intel
®
Core
14
th
Generation, Intel
®
Core
Processor (Series 1) and (Series 2), Intel
®
Xeon
E
2400 Processor and Intel
®
Xeon
6300 Processor
Datasheet, Volume 1 of 2 May 2025
28 Doc. No.: 743844, Rev.: 015