743844-015.pdf - 第6页
8.1.1 DMI Error Flow........................................................................................147 8.1.2 DMI Link Down....................................................................................... 1…
4.1.4 Intel
®
Memory Thermal Management ......................................................... 87
4.2 General Notes...................................................................................................... 88
4.3 Processor Line Power and Frequency Specifications....................................................89
4.4 Processor Line Thermal and Power Specifications.....................................................101
5.0 Memory.....................................................................................................................113
5.1 System Memory Interface.................................................................................... 113
5.1.1 Processor SKU Support Matrix...................................................................113
5.1.2 Supported Memory Modules and Devices.................................................... 115
5.1.3 System Memory Timing Support................................................................119
5.1.4 Memory Controller (MC)...........................................................................122
5.1.5 Memory Controller Power Gate..................................................................122
5.1.6 System Memory Controller Organization Mode (DDR4/5 Only)....................... 122
5.1.7 System Memory Frequency.......................................................................124
5.1.8 Technology Enhancements of Intel
®
FMA.................................................... 124
5.1.9 Data Scrambling..................................................................................... 125
5.1.10 ECC H-Matrix Syndrome Codes................................................................125
5.1.11 Data Swapping .....................................................................................125
5.1.12 LPDDR5/x Ascending and Descending.......................................................126
5.1.13 LPDDR4x CMD Mirroring......................................................................... 126
5.1.14 DDR I/O Interleaving............................................................................. 127
5.1.15 DRAM Clock Generation .........................................................................128
5.1.16 DRAM Reference Voltage Generation ....................................................... 128
5.1.17 Data Swizzling...................................................................................... 128
5.1.18 Error Correction With Standard RAM........................................................ 128
5.1.19 Post Package Repair ..............................................................................128
5.1.20 Refresh Management (RFM).................................................................... 129
5.2 Integrated Memory Controller (IMC) Power Management.......................................... 129
5.2.1 Disabling Unused System Memory Outputs................................................. 129
5.2.2 DRAM Power Management and Initialization................................................ 129
5.2.3 DDR Electrical Power Gating..................................................................... 131
5.2.4 Power Training........................................................................................ 132
6.0 USB-C* Sub System.................................................................................................. 133
6.1 General Capabilities.............................................................................................133
6.2 USB* 4 Router....................................................................................................135
6.2.1 USB 4 Host Router Implementation Capabilities...........................................136
6.3 USB-C Sub-system xHCI/xDCI Controllers.............................................................. 137
6.3.1 USB 3 Controllers....................................................................................137
6.3.2 USB-C Sub-System PCIe Interface.............................................................137
6.4 USB-C Sub-System Display Interface..................................................................... 138
7.0 PCIe* Interface........................................................................................................ 139
7.1 Processor PCI Express* Interface.......................................................................... 139
7.1.1 PCI Express* Support.............................................................................. 139
7.1.2 PCI Express* Architecture........................................................................ 145
7.1.3 PCI Express* Configuration Mechanism ..................................................... 145
7.1.4 PCI Express* Equalization Methodology .....................................................146
7.1.5 PCI Express* Hot Plug............................................................................ 146
8.0 Direct Media Interface and On Package Interface..................................................... 147
8.1 Direct Media Interface (DMI)................................................................................ 147
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Contents—Intel
®
Core
™
, Xeon
™
6300 And Xeon
™
E 2400 Processors
13
th
Generation Intel
®
Core
™
, Intel
®
Core
™
14
th
Generation, Intel
®
Core
™
Processor (Series 1) and (Series 2), Intel
®
Xeon
™
E
2400 Processor and Intel
®
Xeon
™
6300 Processor
May 2025 Datasheet, Volume 1 of 2
Doc. No.: 743844, Rev.: 015 5
8.1.1 DMI Error Flow........................................................................................147
8.1.2 DMI Link Down....................................................................................... 147
8.2 On Package Interface (OPI).................................................................................. 147
8.2.1 OPI Support........................................................................................... 147
8.2.2 Functional Description..............................................................................148
9.0 Graphics....................................................................................................................149
9.1 Processor Graphics..............................................................................................149
9.1.1 Media Support (Intel
®
QuickSync and Clear Video Technology HD)................. 149
9.1.2 Platform Graphics Hardware Feature ......................................................... 152
10.0 Display.................................................................................................................... 153
10.1 Display Technologies Support..............................................................................153
10.2 Display Configuration.........................................................................................153
10.3 Display Features................................................................................................157
10.3.1 General Capabilities............................................................................... 157
10.3.2 Multiple Display Configurations................................................................157
10.3.3 High-bandwidth Digital Content Protection (HDCP)..................................... 157
10.3.4 DisplayPort*......................................................................................... 158
10.3.5 High-Definition Multimedia Interface (HDMI*)........................................... 160
10.3.6 embedded DisplayPort* (eDP*)............................................................... 162
10.3.7 MIPI* DSI............................................................................................ 162
10.3.8 Integrated Audio................................................................................... 163
11.0 Camera/MIPI.......................................................................................................... 165
11.1 Camera Pipe Support......................................................................................... 165
11.2 MIPI* CSI-2 Camera Interconnect....................................................................... 165
11.2.1 Camera Control Logic.............................................................................166
11.2.2 Camera Modules....................................................................................166
11.2.3 CSI-2 Lane Configurations...................................................................... 166
12.0 Signal Description................................................................................................... 168
12.1 System Memory Interface...................................................................................169
12.1.1 DDR4 Memory Interface......................................................................... 169
12.1.2 LP4x-LP5 Memory Interface.................................................................... 170
12.1.3 DDR5 Memory Interface......................................................................... 172
12.2 PCI Express* Graphics (PEG) Signals................................................................... 174
12.3 Direct Media Interface (DMI) Signals....................................................................174
12.4 Reset and Miscellaneous Signals.......................................................................... 175
12.5 Display Interfaces .............................................................................................177
12.5.1 Digital Display Interface (DDI) Signals..................................................... 177
12.5.2 Digital Display Audio Signals................................................................... 178
12.6 USB Type-C Signals........................................................................................... 178
12.7 MIPI CSI 2 Interface Signals............................................................................... 179
12.8 Processor Clocking Signals..................................................................................180
12.9 Testability and Monitoring Signals........................................................................ 180
12.10 Error and Thermal Protection Signals..................................................................181
12.11 Processor Power Rails.......................................................................................182
12.12 Ground and Reserved Signals............................................................................183
12.13 Processor Internal Pull-Up / Pull- Down on Package ............................................. 184
R
Intel
®
Core
™
, Xeon
™
6300 And Xeon
™
E 2400 Processors—Contents
13
th
Generation Intel
®
Core
™
, Intel
®
Core
™
14
th
Generation, Intel
®
Core
™
Processor (Series 1) and (Series 2), Intel
®
Xeon
™
E
2400 Processor and Intel
®
Xeon
™
6300 Processor
Datasheet, Volume 1 of 2 May 2025
6 Doc. No.: 743844, Rev.: 015
13.0 Electrical Specifications.......................................................................................... 185
13.1 Power Delivery.................................................................................................185
13.1.1 Power and Ground Pins.......................................................................... 185
13.1.2 Digital Linear Voltage Regulator (DLVR) .................................................. 185
13.1.3 V
CC
Voltage Identification (VID)...............................................................186
13.1.4 Fast V-Mode..........................................................................................186
13.1.5 Current Excursion Protection (CEP).......................................................... 187
13.2 DC Specifications.............................................................................................. 187
13.2.1 Processor Power Rails DC Specifications....................................................188
13.2.2 Processor Interfaces DC Specifications..................................................... 207
14.0 Package Mechanical Specifications......................................................................... 216
14.1 Package Mechanical Attributes............................................................................ 216
14.2 Package Storage Specifications........................................................................... 218
15.0 CPU And Device IDs................................................................................................ 219
15.1 CPUID..............................................................................................................219
15.2 PCI Configuration Header................................................................................... 220
15.3 Device IDs........................................................................................................221
R
Contents—Intel
®
Core
™
, Xeon
™
6300 And Xeon
™
E 2400 Processors
13
th
Generation Intel
®
Core
™
, Intel
®
Core
™
14
th
Generation, Intel
®
Core
™
Processor (Series 1) and (Series 2), Intel
®
Xeon
™
E
2400 Processor and Intel
®
Xeon
™
6300 Processor
May 2025 Datasheet, Volume 1 of 2
Doc. No.: 743844, Rev.: 015 7