743844-015.pdf - 第83页
Thermal Throttling As the processor approaches TJMax a throttling mechanisms will engage to protect the processor from over-heating and pro vide control thermal budgets. Achieving this is done by reducing IA and other su…
Upon Adaptive Thermal Monitor activation, the processor attempts to dynamically
reduce processor temperature by lowering the frequency and voltage operating point.
The operating points are automatically calculated by the processor IA core itself and
do not require the BIOS to program them as with previous generations of Intel
processors. The processor IA core will scale the operating points such that:
• The voltage will be optimized according to the temperature, the processor IA core
bus ratio and the number of processor IA cores in deep C-states.
• The processor IA core power and temperature are reduced while minimizing
performance degradation.
Once the temperature has dropped below the trigger temperature, the operating
frequency and voltage will transition back to the normal system operating point.
Once a target frequency/bus ratio is resolved, the processor IA core will transition to
the new target automatically.
• On an upward operating point transition, the voltage transition precedes the
frequency transition.
• On a downward transition, the frequency transition precedes the voltage
transition.
• The processor continues to execute instructions. However, the processor will halt
instruction execution for frequency transitions.
If a processor load-based Enhanced Intel SpeedStep Technology/P-state transition
(through MSR write) is initiated while the Adaptive Thermal Monitor is active, there
are two possible outcomes:
• If the P-state target frequency is higher than the processor IA core optimized
target frequency, the P-state transition will be deferred until the thermal event has
been completed.
• If the P-state target frequency is lower than the processor IA core optimized
target frequency, the processor will transition to the P-state operating point.
Clock Modulation
If the frequency/voltage changes are unable to end an Adaptive Thermal Monitor
event, the Adaptive Thermal Monitor will utilize clock modulation. Clock modulation is
done by alternately turning the clocks off and on at a duty cycle (ratio between clock
“on” time and total time) specific to the processor. The duty cycle is factory configured
to 25% on and 75% off and cannot be modified. The period of the duty cycle is
configured to 32 microseconds when the Adaptive Thermal Monitor is active. Cycle
times are independent of processor frequency. A small amount of hysteresis has been
included to prevent excessive clock modulation when the processor temperature is
near its maximum operating temperature. Once the temperature has dropped below
the maximum operating temperature, and the hysteresis timer has expired, the
Adaptive Thermal Monitor goes inactive and clock modulation ceases. Clock
modulation is automatically engaged as part of the Adaptive Thermal Monitor
activation when the frequency/voltage targets are at their minimum settings.
Processor performance will be decreased when clock modulation is active. Snooping
and interrupt processing are performed in the normal manner while the Adaptive
Thermal Monitor is active.
Clock modulation will not be activated by the Package average temperature control
mechanism.
R
Intel
®
Core
™
, Xeon
™
6300 And Xeon
™
E 2400 Processors—Thermal Management
13
th
Generation Intel
®
Core
™
, Intel
®
Core
™
14
th
Generation, Intel
®
Core
™
Processor (Series 1) and (Series 2), Intel
®
Xeon
™
E
2400 Processor and Intel
®
Xeon
™
6300 Processor
Datasheet, Volume 1 of 2 May 2025
82 Doc. No.: 743844, Rev.: 015
Thermal Throttling
As the processor approaches TJMax a throttling mechanisms will engage to protect the
processor from over-heating and provide control thermal budgets.
Achieving this is done by reducing IA and other subsystem agent's voltages and
frequencies in a gradual and coordinated manner that varies depending on the
dynamics of the situation. IA frequencies and voltages will be directed down as low as
LFM (Lowest Frequency Mode). In rare extreme conditions the processor may slow
down IO operations to prevent shutdown.
Further restricts are possible via Thermal Trolling point (TT1) under conditions where
thermal budget cannot be re-gained fast enough with voltages and frequencies
reduction alone. TT1 keeps the same processor voltage and clock frequencies the
same yet skips clock edges to produce effectively slower clocking rates. This will
effectively result in observed frequencies below LFM on the Windows PERF monitor.
Digital Thermal Sensor
Each processor has multiple on-die Digital Thermal Sensor (DTS) that detects the
processor IA, GT and other areas of interest instantaneous temperature.
Temperature values from the DTS can be retrieved through:
• A software interface using processor Model Specific Register (MSR).
• A processor hardware interface.
When the temperature is retrieved by the processor MSR, it is the instantaneous
temperature of the given DTS. When the temperature is retrieved using PECI, it is the
average of the highest DTS temperature in the package over a 256 ms time window.
Intel recommends using the PECI reported temperature for platform thermal control
that benefits from averaging, such as fan speed control. The average DTS temperature
may not be a good indicator of package Adaptive Thermal Monitor activation or rapid
increases in temperature that triggers the Out of Specification status bit within the
PACKAGE_THERM_STATUS (0x1B1) MSR and IA32_THERM_STATUS (0x19C) MSR.
Code execution is halted in C1 or deeper C-states. Package temperature can still be
monitored through PECI in lower C-states.
Unlike traditional thermal devices, the DTS outputs a temperature relative to the
maximum supported operating temperature of the processor (Tj
MAX
), regardless of
TCC activation offset. It is the responsibility of software to convert the relative
temperature to an absolute temperature. The absolute reference temperature is
readable in the TEMPERATURE_TARGET (0x1A2) MSR. The temperature returned by
the DTS is an implied negative integer indicating the relative offset from Tj
MAX
. The
DTS does not report temperatures greater than Tj
MAX
. The DTS-relative temperature
readout directly impacts the Adaptive Thermal Monitor trigger point. When a package
DTS indicates that it has reached the TCC activation (a reading of 0x0, except when
the TCC activation offset is changed), the TCC will activate and indicate an Adaptive
Thermal Monitor event. A TCC activation will lower both processor IA core and
graphics core frequency, voltage, or both. Changes to the temperature can be
detected using two programmable thresholds located in the processor thermal MSRs.
These thresholds have the capability of generating interrupts using the processor IA
core's local APIC. Refer to the Intel 64 Architectures Software Developer’s Manual for
specific register and programming details.
Digital Thermal Sensor Accuracy (T_accuracy)
4.1.3.2
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Thermal Management—Intel
®
Core
™
, Xeon
™
6300 And Xeon
™
E 2400 Processors
13
th
Generation Intel
®
Core
™
, Intel
®
Core
™
14
th
Generation, Intel
®
Core
™
Processor (Series 1) and (Series 2), Intel
®
Xeon
™
E
2400 Processor and Intel
®
Xeon
™
6300 Processor
May 2025 Datasheet, Volume 1 of 2
Doc. No.: 743844, Rev.: 015 83
The error associated with DTS measurements will not exceed ±5 °C within the entire
operating range.
Fan Speed Control with Digital Thermal Sensor
Digital Thermal Sensor based fan speed control (T
FAN
) is a recommended feature to
achieve optimal thermal performance. At the T
FAN
temperature, Intel recommends full
cooling capability before the DTS reading reaches Tj
MAX
.
PROCHOT# Signal
The PROCHOT# (processor hot) signal is asserted by the processor when the TCC is
active. Only a single PROCHOT# pin exists at a package level. When any DTS
temperature reaches the TCC activation temperature, the PROCHOT# signal will be
asserted. PROCHOT# assertion policies are independent of Adaptive Thermal Monitor
enabling.
The PROCHOT# signal can be configured to the following modes:
• Input Only: PROCHOT is driven by an external device.
• Output Only: PROCHOT is driven by processor.
• Bi-Directional: Both Processor and external device can drive PROCHOT signal
PROCHOT Input Only
The PROCHOT# signal should be set to input only by default. In this state, the
processor will only monitor PROCHOT# assertions and respond by setting the
maximum frequency to 10Khz.
The following two features are enabled when PROCHOT is set to Input only:
• Fast PROCHOT: Respond to PROCHOT# within 1uS of PROCHOT# pin assertion,
reducing the processor power.
• PROCHOT Demotion Algorithm: designed to improve system performance
during multiple PROCHOT assertions.
Figure 18. PROCHOT Demotion Description
X GHz
IA CLK
Dilution
LFM X GHz
X GHzX GHz X GHz X GHz (X-1) GHz (X-2) GHz
LFM LFM LFM LFM LFM LFM
X : IA high frequency (SKU dependent)
PROCHOT /
Core frequency
IA freq
Max Prochot
Frequency 10 kHz
PROCHOT Output Only
Legacy state, PROCHOT is driven by the processor to external device.
4.1.3.3
4.1.3.4
R
Intel
®
Core
™
, Xeon
™
6300 And Xeon
™
E 2400 Processors—Thermal Management
13
th
Generation Intel
®
Core
™
, Intel
®
Core
™
14
th
Generation, Intel
®
Core
™
Processor (Series 1) and (Series 2), Intel
®
Xeon
™
E
2400 Processor and Intel
®
Xeon
™
6300 Processor
Datasheet, Volume 1 of 2 May 2025
84 Doc. No.: 743844, Rev.: 015