IPC-TM-650 EN 2022 试验方法--.pdf - 第756页
1 Scope These methods determine the ph ysical endurance of representative coupons of printed boards to a series of high t em p er a t ur e e x cu r s io n s f r o m a m b ie n t . T h e te m p e r at ur e excursions caus…
Failure Type & Distance (between drilled hole walls, or hole wall to plane
edge). Examples:
PTH-PTH, 11.0 mils, Nelco 4000-11
PTH-Plane (GND), 15.0 mils, FR406 (dicy-cured)
Current Limiting Resistor Value (default is 1.0 meg-ohm or 10
6
ohms)
Assembly Process Simulation: Examples
No Bake, No Preconditioning
Bake (specify), No Preconditioning
Bake (specify), 3X @ 260 °C Preconditioning (specify profile)
Bake (specify), 6X @ 260 °C Preconditioning (specify profile)
Bake (specify), 6X @ 230 °C Preconditioning (specify profile)
Bake (specify), 5X @ 245 °C Preconditioning (specify profile)
CAF Test Parameters: Examples
15 Vdc, 50 °C, 80% RH, drilled hole wall to hole wall spacings
100 Vdc, 65 °C, 87% RH, drilled hole wall to hole wall spacings
10 Vdc, 65 °C, 85% RH, drilled hole wall to hole wall spacings
Material(s) Tested: Examples
FR406 (dicy-cured)
Nelco 4000-11
Reporting Dates: Examples
Date Tested: August 2006
Date CAF Test Coupon Manufactured: February 2006
Number
2.6.25
Subject
Conductive Anodic Filament (CAF) Resistance Test: X-Y Axis
Date
02/21
Revision
C
IPC-TM-650
Parameters
Comments
Page
11
of
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1 Scope
These methods determine the physical endurance
of representative coupons of printed boards to a series of high
temperature excursions from ambient. The temperature
excursions cause thermo-mechanical fatigue of the electrical
interconnect structures.
The test coupon is resistance heated by passing DC current
through the coupon to bring the temperature of the copper to
a designated temperature. Switching the current on and off
creates thermal cycles between room temperature and the
designated temperature within the sample. The laminate and
surrounding materials are heated to different extents depend-
ing on the thermal conductivity of the materials. The thermal
cycling can accelerate latent interconnect anomalies to failure.
The number of cycles achieved permits a quantitative assess-
ment of the performance.
1.1 Method A Description
Method A uses a coupon with
two or more independent electrical nets. The designation for
these nets is either a power net (P) or a sense net (S). Each
electrical net consists of plated barrels and conductors (inter-
nal and external). DC current is passed through one electrical
net to heat the coupon to a designated temperature. When
the electrical net is at the designated temperature, the DC
current is turned off and cooling fans are turned on to cool the
coupons to ambient temperature. One heating and cooling
sequence represents a thermal cycle. Thermal cycling is con-
tinued to either a set number of cycles or a failure. Tempera-
ture coefficient of resistance (TCR) is estimated by proprietary
algorithms.
A failure is based on a percentage change in the bulk resis-
tance of the coupon at the designated test temperature. The
percentage change is measured independently for each elec-
trical net being tested. When the percentage change is
exceeded, the test is stopped for the coupon.
1.2 Method B Description
Method B uses a coupon with
one electrical net. The net consists of via structures con-
nected by external and/or internal circuit lines in a daisy chain.
DC current is passed through the electrical net to heat the
coupon to a designated temperature. When the electrical net
is at the designated temperature, the DC current is turned off
and a cooling fan is turned on to cool the coupons to ambient
temperature. One heating and cooling sequence represents a
thermal cycle. Thermal cycling is continued to either a set
number of cycles or a failure. Temperature coefficient of resis-
tance (TCR) is measured.
A failure is based on a percentage change in the bulk resis-
tance of the coupon at the designated test temperature. The
percentage change is measured independently for each elec-
trical net being tested. When the percentage change is
exceeded, the test is stopped for the coupon.
2 Applicable Documents
2.1 IPC
1
Method Development Packet
Test Methods Manual
2
2.1.1 Microsectioning
2.5.35 Capacitance of Printed Board Substrates After
Exposure to Assembly, Rework, and/or Reliability
Tests. (At the time of publication of this test method,
2.5.35 is in development.)
2.6.27 Thermal Stress, Convection Reflow Assembly
Simulation
3 Test Specimens
A typical daisy chain test coupon for
each method is shown in Figure 3-1 and Figure 3-2.
1. www.ipc.org
2. Current and revised IPC Test Methods are available on the IPC Web site (www.ipc.org/html/testmethods.htm)
3000 Lakeside Drive, Suite 309S
Bannockburn, IL 60015-1249
IPC-TM-650
TEST METHODS MANUAL
Number
2.6.26
Subject
DC Current Induced Thermal Cycling Test
Date
5/14
Revision
A
Originating Task Group
PTV Reliability Test Methods (6-10c)
Association
Connecting
Electronics
Industries
IPC-MDP-650
IPC-TM-650
Material
/n
this
Test
Methods
Manual
was
voluntarily
established
by
Technical
Committees
of
I
PC.
This
material
/s
advisory
only
and
"s
use
or
adaptation
，
s
entirely
voluntary.
IPC
disclaims
all
liability
of
any
kind
as
to
the
use,
application,
or
adaptation
of
this
material.
Users
are
also
wholly
responsible
for
protecting
themselves
against
all
claims
or
liabilities
for
patent
infringement.
Equipment
referenced
/s
for
the
convenience
of
the
user
and
does
not
imply
endorsement
by
IPC.
Page
1
of
10
IPC-2626-3-1
IPC-2626-3-2
Number
2.6.26
Subject
DC Current Induced Thermal Cycling Test
Date
5/14
Revision
A
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Connector
Hole
0.043
Hole
Centers
on
0.100'*
Pad
Size
0.060"
Capacitance
Hole
0.043"
Hole
Centers
on
0.1
50'*
Pad
Size
0.060"
X
0.060"
Connector
Hole
0.043*'
Hole
Centers
on
0.1
00M
Pad
Size
0.060"
Pick-up
area
Active
test
area
on
product
grid:
External
and/or
internal
Figure
3-1
Method
A
Test
Coupon
Figure
3-2
Method
B
Test
Coupon
IPC-TM-650
—
S
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