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SEMI E122-0703 © SEMI 2003 3 PR O CESSI N G ACT I VE PAU SE PR O CESS PAU SE PR O CESS EXEC U T IN G G EM R EAD Y PAU SED IDLE W ITH ALAR MS ALAR M PAU SED PAU SIN G R EAD Y ABO R T IN G CHE CK I NG S E TT I NG UP IDLE I…

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5.1.3 datalog — collection of results of individual test
measurements gathered during the execution of the test
program.
5.1.4 diagnostic fixture — any electromechanical
fixture required to perform system diagnostics. The
diagnostic fixture may consist of multiple components
with different parts and serial numbers.
5.1.5 execution area — the area from which a current
copy of the process program instructions is executed.
5.1.6 hard-bin — hard-bins represent the typical view
of the test results. Within a process program, each
hard-bin is associated with a single class. Generally,
multiple hard-bins are associated with a particular class.
5.1.7 multi-site testing — testing of multiple units with
one execution of the test program. Each unit has it own
test results.
5.1.8 soft-bin — soft-bins represent the most detailed
view of the test results. Within a process program, each
soft-bin is associated with a single hard-bin. Generally,
multiple soft-bins are associated with a particular hard-
bin.
5.1.9 station controller (SC) — the station controller
consists of software that coordinates the actions of the
test system and the unit handling equipment (wafer
prober, package handler, etc.). It may reside on the test
system computer or some other computer. One station
controller may be in charge of one or more virtual
testers.
5.1.10 system calibration — test system process
required to bring the test system into compliance with
the test system manufacturer’s system specifications.
5.1.11 test-board — the electromechanical interface
necessary to enable temporary electrical contact
between the unit to be tested and the tester resource.
The test-board may consist of multiple components.
5.1.12 test-head — a resource of the tester. The test-
head is the electromechanical interface between the unit
and the tester.
5.1.13 test-site — a location on a test-board where one
unit at a time is positioned for testing.
5.1.14 tester executive — the tester software which
controls test program execution.
5.1.15 testing equipment — an equipment class
generally consisting of integrated mechanisms and
controls for performing electrical tests of packaged
devices and/or wafer die (units) during the
manufacturing process.
5.1.16 unit — the functional integrated circuit (or chip)
that is to be electrically tested.
5.1.17 virtual tester — the virtual tester is a logical
concept which describes the dynamic allocation of a
portion of the physical hardware available in a test
system to a test program that uses those resources to
test a unit or set of units.
6 State Model
6.1 The purpose is to define the equipment-specific
processing state model and other state models necessary
to portray the expected operational states of the
equipment to enable host tracking and control in place
of a local operator.
6.2 State Model Requirements
6.2.1 The processing state model in this document is
required for implementing a TSEM-compliant tester. A
state model consists of a processing state model
diagram, processing state definitions, and a processing
state transition table. A state model represents the
host’s view of the virtual tester, but not necessarily the
actual tester operations. All TSEM state model
transitions shall be mapped sequentially into the actual
equipment events that satisfy the requirements of those
transitions. In certain implementations, the tester may
enter a state and have already satisfied all of the
conditions required by the TSEM state model for
transition to another state. In this situation, the tester
makes the required transition without any additional
actions.
6.2.2 Some equipment may need to include additional
states. However, any additional states must not change
the TSEM-defined state transitions. All expected
transitions between TSEM states must occur.
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PROCESSING ACTIVE
PAUSE
PROCESS
PAUSE
PROCESS
EXECUTING
GEM READY
PAUSED
IDLE WITH
ALARMS
ALARM
PAUSED
PAUSING
READY
ABORTING
CHECKING
SETTING UP
IDLE
INIT0
2
3
4
1
26
23
25
24
19
22
18
13 14
8
17
16
STOPPING
21
11
7
9
C*
15
20
10
65
29
INIT WITH
ALARMS
27
28
12
Figure 1
TSEM Processing State Model
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6.3 Description of Tester Processing States
6.3.1 ABORTING (PROCESSING ACTIVE Sub-State)
— The tester has received an ABORT command. All
activity is immediately suspended. The tester is taking
appropriate action to bring itself and material to a
“safe” state where possible.
6.3.2 ALARM PAUSED (PAUSE Sub-State) — An
alarm has occurred in the PROCESS or PROCESS
PAUSE states and the tester is waiting for the alarm to
be cleared.
6.3.3 CHECKING (PROCESS PAUSE Sub-State) —
The tester verifies that updates made to the process
program are valid. Process program updates result in
the definition of a new process program. This is a
similar procedure to that which is done in SETTING
UP. If there are no process program updates, this is a
pass through state. At the successful completion of
verification, a transition, based on the process model
condition table, is made to the process state.
6.3.4 EXECUTING (PROCESS Sub-State) — The
tester is processing material.
6.3.5 IDLE — The tester executive is loaded and the
tester is awaiting a command. IDLE is free of
ALARMS and error conditions. If this state is entered
with valid alarms (e.g. as a result of an abnormal exit
from ABORTING, STOPPING, or SETTING UP) then
this state is a pass through to IDLE WITH ALARMS.
6.3.6 IDLE WITH ALARMS — An alarm has occurred
in the IDLE state and the tester is waiting for all alarms
to be cleared. An operator may be required to clear
alarm conditions. The system shall remain in this state
until all alarm conditions are cleared, including those
that require operator intervention.
6.3.7 INIT — Tester initialization is occurring. The
tester executive is loading.
6.3.8 INIT WITH ALARMS — An alarm occurred
during the initialization process.
6.3.9 PAUSE (PROCESSING ACTIVE Sub-State) —
This state is the parent of those sub-states in which the
process program is paused.
6.3.10 PAUSED (PROCESS PAUSE Sub-State) — The
PROCESS state has been suspended and the tester is
waiting for a command (RESUME, STOP, or ABORT).
In this state, the operator may modify conditions of the
current Process Program selection.
6.3.11 PAUSING (PROCESS PAUSE Sub-State) —
The current state will be suspended at the completion of
the current unit(s), if any, and the tester will be brought
to a “safe” state.
6.3.12 PROCESS (PROCESSING ACTIVE Sub-State)
— This state is the parent of those sub-states that refer
to the preparation and execution of a process program.
6.3.13 PROCESS PAUSE (PAUSE Sub-State) — This
state is the parent state of the sub-states that refer to the
pausing of tester operation. The tester is free of alarm
conditions in the PAUSE state.
6.3.14 PROCESSING ACTIVE — This state is the
parent state of the sub-states that know the identity of
the process program.
6.3.15 READY (PROCESS Sub-State) — The process
program is loaded. The tester is ready to begin
processing and is awaiting a START command.
6.3.16 SETTING UP (PROCESS Sub-State) — The
selected process program is loading. The tester is
satisfying conditions so that processing can begin. This
includes the initialization and validation of the process
program and process program-specific calibration. This
may be accomplished independently by the tester or
may require interaction with the operator and/or host.
6.3.17 STOPPING (PROCESSING ACTIVE Sub-State)
— The tester has been instructed to stop processing and
shall do so at the next opportunity. All necessary
cleanup is completed within this state with regard to
material, data, control system, etc.
6.3.18 GEM READY — The GEM session is running
and ready to accept a START EXEC command from
the host.