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SEMI F47-0200 © SEMI 199 9, 2000 4 Table 1 Voltage Sa g Duration and Percent Deviation from E quipment Nominal Voltage VOLTAGE SAG DURATION VOL TAGE SAG Seconds ( s) Millisec onds (ms) Cyc les at 60 hz Cycle s at 50 hz P…

SEMI F47-0200 © SEMI 1999, 20003

8 Test Methods

8.1 Qualification tests are conducted on samples of

production articles, not each item produced.

Qualification testing of equipment to requirements in

this specification should be performed per SEMI F42.

9 Related Documents

9.1 SEMI Standard

SEMI S9 — Electrical Test Methods for Semiconductor

Manufacturing Equipment

9.2 CENELEC Standard

EN 50082-2 — Electromagnetic Compatibility —

Generic Immunity Standard, Part 2: Industrial

Environments

9.3 IEC Standard

IEC 61000-4-11 — Electromagnetic Compatibility

(EMC) — Part 4: Testing and Measuring Techniques

— Section 11: Voltage Dips, Short Interruptions and

Voltage Variations Immunity Tests

9.4 IEEE Standard

IEEE 1346 — Electric Power System Compatibility

with Electronic Process Equipment

NOTE 4: As listed or revised, all documents cited shall be the

latest publications of adopted standards.

2 European Committee for Electrotechnical Standardization, Rue de

Stassart, 35, B – 1050, Brussels

3 International Electrotechnical Commission, 3, rue de Varembé, P.O.

Box 131, 1211 Geneva 20, Switzerland

SEMI F47-0200 © SEMI 1999, 2000 4

Table 1 Voltage Sag Duration and Percent Deviation from Equipment Nominal Voltage

VOLTAGE SAG DURATION VOLTAGE SAG

Seconds (s) Milliseconds (ms) Cycles at 60 hz Cycles at 50 hz

Percent (%) of

Equipment Nominal

Voltage

< 0.05 s < 50 ms < 3 cycles < 2.5 cycles Not specified

0.05 to 0.2 s 50 to 200 ms 3 to 12 cycles 2.5 to 10 cycles 50%

0.2 to 0.5 s 200 to 500 ms 12 to 30 cycles 10 to 25 cycles 70%

0.5 to 1.0 s 500 to 1000 ms 30 to 60 cycles 25 to 50 cycles 80%

> 1.0 s > 1000 ms > 60 cycles > 50 cycles Not specified

Percent of Equipment Nominal Voltage

0.2 0.50.1 1.0

0.05

Duration of Voltage Sag in Seconds

100

NOTE: Equipment must continue to operate without interrupt during voltage sags above the line.

Figure 1

Required Semiconductor Equipment Voltage Sag Ride-Through Capability Curve

NOTICE: SEMI makes no warranties or

representations as to the suitability of the standards set

forth herein for any particular application. The

determination of the suitability of the standard is solely

the responsibility of the user. Users are cautioned to

refer to manufacturer’s instructions, product labels,

product data sheets, and other relevant literature

respecting any materials mentioned herein. These

standards are subject to change without notice.

The user’s attention is called to the possibility that

compliance with this standard may require use of

copyrighted material or of an invention covered by

patent rights. By publication of this standard, SEMI

takes no position respecting the validity of any patent

rights or copyrights asserted in connection with any

item mentioned in this standard. Users of this standard

are expressly advised that determination of any such

patent rights or copyrights, and the risk of infringement

of such rights, are entirely their own responsibility.

SEMI F47-0200 © SEMI 1999, 20005

RELATED INFORMATION 1

RELATIONSHIP TO OTHER ELECTRICAL STANDARDS

NOTE: This related information is not an official part of

SEMI F47 and is not intended to modify or supersede the

official standard. It has been derived from the work of the

originating task force. Determination of the suitability of

the material is solely the responsibility of the user.

R1-1 Basis for this Industry-Specific

Semiconductor Standard

R1-1.1 The Information Technology Industry

Council (ITIC) “CBEMA-curve,” contained in IEEE

446, IEEE 1100, and SEMI E51, was used as a

starting point in establishing recommended ride-

through limits. The following curve (see Figure R1-

1) was developed to define voltage sag ride-through

for use with semiconductor processing equipment.

Primarily due to testing limitations, only the portion

between 0.05 seconds (50 milliseconds) and 1.0

seconds was selected for inclusion in the

specification. As future test equipment, methods, and

data are developed the specified duration limits may

be expanded. Recommended voltage sag ride-

through capability limits from zero to 100 seconds

are included here for reference (see Figure R1-1).

While not currently included in this SEMI

specification the wider range should be considered

when designing equipment and selecting

components.

R1-1.2 Over voltage conditions also covered in the

ITIC CBEMA-curve contained in IEEE 446, IEEE

1100, and SEMI E51, are not considered in the scope

of this industry-specific specification primarily due to

the extremely low number of semiconductor

equipment interruptions caused by over voltage

events. While not in the scope of this specification,

over voltage conditions should not be ignored and

use of existing equipment protection techniques

should be continued (see SEMI E51 or IEEE 446 for

generic equipment over voltage ride-through

specifications).

R1-2 Relationship to Generic Electrical

Standards

R1-2.1 This SEMI standard is intended to be

coordinated with related SEMI, IEC and IEEE

standards. The relationship of this SEMI

specification to many other standards that address

equipment immunity, test methods, and safety was

considered in development of this specification. For

example, the emerging IEC Generic Immunity standard

for industrial environments currently published by

CENELEC as EN 50082-2 recommends a generic

equipment immunity limit for Europe. When published

by IEC, this standard will provide a generic equipment

voltage sag immunity limit. Another example is the US

National Fire Protection Association on Industrial

Machinery (NFPA 79), which sets a generic equipment

voltage sag immunity limit for the United States.

R1-2.2 These emerging generic limits were considered in

the establishment of ride-through limits for semiconductor

equipment. However, most generic equipment limits are

less stringent than the existing CBEMA-curve currently

referenced in SEMI E51. For most installations meeting

the CBEMA limits (a specification which was developed

for computer business equipment) still results in an

unacceptable number of semiconductor equipment

interrupts. Therefore, the requirements in this

international standard were developed to better suit the

semiconductor industry. While more stringent, this

industry-specific specification is not in conflict with

known generic equipment regulations from other regions

or generic equipment standards from other organizations.

R1-2.3 Another published IEC standard defines a generic

immunity test method for voltage sags (dips), IEC 61000-

4-11. This standard does not provide limits but does

provide a voltage sag test method for single-phase

equipment rated less than 16 amps. It has been

considered in defining voltage sag ride-through

parameters and it may provide an interim voltage sag

immunity test method. As noted in this document, a test

method for three-phase equipment greater than 16 amps is

being developed for use with semiconductor equipment.

R1-2.4 The generic type standards developed for

industrial or consumer equipment by organizations like

IEC, ITIC, and IEEE provide a foundation for industry-

specific standards like those published by SEMI

Standards. In acknowledgement of this tiered approach to

standardization there are provisions for recognizing

industry-specific or product-type standards by

organizations like IEC. Typically, product-type standards

when developed by industry-specific organizations take

precedent over the broader based generic industrial

standards.