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SEMI M35-1104 © SEMI 1999, 1104 1 SEMI M35-1104 GUIDE FOR DEVELOPING SPECIF ICATIONS FOR SILICON WAFER SURFACE FEATURES DETECTED BY AUTOMATED INSPECTION This guide was technically approved b y the Global Silicon Wafer Co…
SEMI M34-0299 © SEMI 1999 10
8.5 Buried Oxide Fast Interfaces State Density This
parameter can be measured with a buried oxide
capacitor (BOX-CAP). The buried oxide thickness and
the intended application will affect both the test
procedure (such as capacitor area and voltage criterion)
and the allowable values of measured parameters.
These should be determined by agreement between the
user and vendor. Example procedure and values for
standard evaluation of 400 nm thick buried oxide are
given in the following paragraphs.
8.5.1 Test Structure — Buried oxide capacitor having
an area of 0.01 cm
2
.
8.5.2 Test Method — High-Low Frequency MOS C-V.
If care is taken in their fabrication to minimize oxide
surface damage and contamination during silicon
etching, good quality quasi-static MOS C-V curves can
be measured on BOX-CAP' s. From comparison of high
and low frequency C-V curves, midgap interface state
density can be determined exactly as for normal MOS
capacitors.
8.5.3 Values
Dit (0) < = 5 × 10
10
states/ /cm
2
-eV
8.6 Doping Density in the SIMOX Layer
8.6.1 Test Structure — The untreated SIMOX wafer.
Substrate: Buried oxide capacitor, area = 0.01 cm
2
8.6.2 Test Method — Spreading Resistance Probing
(SRP) offers a way of determining the resistance profile
in the Si layer as a function of distance from the top
surface. The carrier concentration can be calculated
directly from this data.
8.6.2.1 The four point probe method of SIMS can also
be used. The four point probe test is liable to punch
through and should be considered a destructive test as is
SIMS. SIMS will allow for an understanding of
compensation effects, if any.
8.6.3 Values The acceptable dopant values are to be
determined by agreement between the user and vendor.
8.7 Doping Density in the Substrate
8.7.1 Test Structure A buried oxide capacitor
(BOX-CAP) area = 0.01 cm
2
.
8.7.2 Test Method The electrically active dopant
concentration in the substrate immediately beneath the
buried oxide can be determined from the standard
analysis of high frequency MOS C-V curves measured
on BOX-CAPs, dependent on oxide charge and
interface properties.
Values — The acceptable dopant values are to be
determined by agreement between the user and vendor.
9. Packing and Marking
9.1 Special packing requirements shall be subject to
agreement between the user and supplier. Otherwise, all
wafers shall be handled, inspected, and packed in such
a manner as to avoid chipping, scratches, and
contamination and in accordance with the best industry
practices to provide ample protection against damage
during shipment.
9.2 The wafer supplied under these specifications shall
be identified by appropriately labeling the outside of
each box or other container, and each subdivision
thereof, in which it may reasonably be expected that the
wafers will be stored prior to further processing.
Identification marks, codes, symbols and content shall
be agreed upon between user and supplier.
NOTICE: These guidelines do not purport to address
all of the safety issues associated with their use. It is the
responsibility of the users of these guidelines to
establish appropriate safety and health practices and
determine the applicability of regulatory limitations
prior to use. SEMI makes no warranties or
representations as to the suitability of the guidelines set
forth herein for any particular application. The
determination of the suitability of these guidelines is
solely the responsibility of the user. Users are cautioned
to refer to manufacturer' s instructions, product labels,
product data sheets, and other relevant literature
respecting any materials mentioned herein. These
guidelines are subject to change without notice.
The user' s attention is called to the possibility that
compliance with this standard may require use of
copyrighted material or of an invention covered by
patent rights. By publication of this standard, SEMI
takes no position respecting the validity of any patent
rights or copyrights asserted in connection with any
item mentioned in this standard. Users of this standard
are expressly advised that determination of any such
patent rights or copyrights, and the risk of infringement
of such rights, are entirely their own responsibility.
Copyright by SEMI® (Semiconductor Equipment and Materials
International), 3081 Zanker Road, San Jose, CA 95134. Reproduction o
f
the contents in whole or in part is forbidden without express written
consent of SEMI.
SEMI M35-1104 © SEMI 1999, 1104 1
SEMI M35-1104
GUIDE FOR DEVELOPING SPECIFICATIONS FOR SILICON WAFER
SURFACE FEATURES DETECTED BY AUTOMATED INSPECTION
This guide was technically approved by the Global Silicon Wafer Committee and is the direct responsibility
of the North American Silicon Wafer Committee. Current edition approved by the North American Regional
Standards Committee on August 16, 2004. Initially available at www.semi.org September 2004; to be
published November 2004. Originally published February 1999.
1 Purpose
1.1 Inspection of silicon wafer surfaces is a standard
outgoing test on all commercially sold silicon wafers.
1.2 Older specifications referred to visual inspection of
wafer surfaces, but with advanced technologies, the
sizes of many important surface features are too small
to be seen visually and so other types of surface
inspection become necessary.
1.3 This guide provides a specification framework for
reporting measurements of silicon wafer surface
features through the use of scanning (or automated)
surface inspection systems (SSIS).
2 Scope
2.1 This guide addresses specifications related to
localized light scatterers (LLSs) as well as extended
light scatterers (XLSs). Examples of LLSs are particles
and pits. Examples of XLSs are scratches and regions
of high roughness (surface haze).
2.2 Surface scanners, which have discriminated
between XLSs and LLSs for several years, are now
discriminating (and selectively reporting) between
different types of LLSs (for example: pits and
particles).
2.3 Specific numbers limiting feature levels and/or
densities are to be agreed upon between suppliers and
customers. This guide provides a framework for that
communication.
2.4 The resulting specifications will be flexible enough
to accommodate variations in measurement due to
different SSIS models.
NOTICE: This standard does not purport to address
safety issues, if any, associated with its use. It is the
responsibility of the users of this standard to establish
appropriate safety and health practices and determine
the applicability of regulatory or other limitations prior
to use.
3 Discussion
3.1 Discussion of LLS Measurement Issues
3.1.1 Because there is considerable variation in the
scatter characteristics of different LLSs, they have been
historically sized in latex sphere equivalents (LSE). In
other words, the signal received from an unknown LLS
is equivalent to that which would be obtained from a
polystyrene latex (PSL) sphere of known size.
3.1.2 Automated scanning systems typically display a
map of LLS location as well as a histogram of LSE
size.
3.1.3 The instrumentation industry is building SSISs
that discriminate some LLSs from others based on
differences in measured scatter that depend on feature
size, shape and material. This raises the question of
whether identified LLSs should continue to be sized
using latex sphere equivalents, or if some new (more
accurate) standard would be more acceptable. For
example, if an LLS signal could be identified as coming
from a pit, then it might become appropriate to develop
a standard pit wafer. In this case, pits (either
manufactured or found naturally) could be measured
via atomic force microscope (AFM) and be made
available on a calibration wafer to size pits via their
measured scatter. Another option, would be to use a
model-based standard that resides in the SSIS software.
3.2 Discussion of XLS Measurement Issues
3.2.1 Identification of scratches is typically done (in
part) through software that identifies a string of
connected LLS signals. Defects with dimensions such
that the length is at least five times the width are
defined as scratches. Customers and suppliers may
agree on scratch aspect ratios different from 5:1. SSIS
software often provides a customer-settable aspect
ratio, as well as a minimum overall length, as criteria
for classification of an SSIS defect or group of defects
as a scratch. Depending on SSIS design, scratch
sensitivity may also be a function of scratch orientation.
Currently, scratch signals are also calibrated in latex
sphere equivalents; however, in the future it may
become useful to calibrate scratch signals with a
standard obtained from a scratch that has been either
SEMI M35-1104 © SEMI 1999, 2004 2
manufactured to a known size, or has been measured
via AFM.
3.2.2 Haze is specified as parts per million (ppm) of
measured scattered optical power relative to the
incident optical power on the surface. All of the
associated measurement conditions must be given (or
implied) with the specified haze value. These
conditions include: source incident angle (measured as
a polar angle from surface normal), source polarization
(S, P, other), source wavelength (or wavelength band),
nominal source spot size at the wafer, haze collection
angles (given as solid angles with directions). All of
these quantities must be part of a haze specification,
either by description, or by implication to specific
instrumentation (with known or fixed parameters).
3.2.3 Haze is quantified by measuring scattered light
power over one or more solid angles and then
normalizing by the light power incident on the surface.
It is nothing more than the diffuse reflectance of a
surface in specified directions for a known source
(incident angle, polarization, spot size, wavelength
band) and receiver (or detector) configuration (solid
angles and locations). Measured haze can be expected
to change if the surface is changed, or if any of the
measurement parameters change.
3.2.4 Under special conditions, where the source of the
haze is known, it may be possible to use a model to
predict the haze reading on one instrument from the
haze reading on another. For example, if on the basis of
product experience and measurements on a few wafers,
the surface power spectral density function can be
determined, then the haze due to surface roughness can
be calculated for an instrument with different
parameters. Haze caused by a large number of small
particles and/or film contamination is more difficult to
model.
3.2.5 An SSIS often reports haze as the arithmetic
average of a grid of local haze measurements taken over
the FQA. This average can be, and often is, biased by
wafer haze distributions that exhibit long, positively
skewed tails. SSIS software is being developed that
automatically calculates other haze statistics, such as
the median haze value, the standard deviation of the
haze distribution, and so on.
3.3 The SSIS used for automated inspection of silicon
wafer surfaces should be calibrated in terms of latex
sphere equivalents in accordance with SEMI M53 or
another method agreed upon between supplier and
customer.
4 Limitations
4.1 The following measurement considerations impose
limitations on the guidelines.
4.1.1 Histograms calculated in latex sphere equivalents
may be distorted, because a given surface has in general
LLSs of different size, shape, and material.
4.1.2 Measurement results do not always compare well
between systems, because different SSIS designs
employ different geometries and gather light scattered
in different directions. Haze maps may have different
levels and localized surface features may have different
calculated sizes.
4.1.3 All scanning systems have a minimum LSE size
of LLSs that can be reliably mapped and sized. The
limitation is due to a combination of system electrical
noise and the detection of non-particle light scatter
signals, such as those created by Rayleigh scatter,
surface roughness and system optics. Operation near
this noise floor limits the utility of this guide for LLSs
of those sizes.
4.1.4 Measurements made near the wafer edge often
result in large numbers of false counts called edge blast.
These counts are caused by small amounts of stray light
propagating near the incident beam that scatter from the
relatively rough wafer edge back into the detector
optics. Under certain combinations of sensitivity and
edge exclusion, light scattered from these effects may
cause false counts within the FQA.
4.1.5 Types of LLS signals that may be mis-identified
as scratches include lines of particles, pits, false counts,
stacking faults, slip, and spin dry residue.
4.1.6 Closely spaced features may be counted as a
single scattering event because the scanning spot size is
generally much larger than the feature diameter.
4.1.7 Scratch orientation usually affects scanner
response. Thus the minimum detectable scratch cross-
section may vary with orientation.
5 Referenced Standards
5.1 SEMI Standards
SEMI M1 Specifications for Polished Mono-
crystalline Polished Silicon Wafers
SEMI M53 — Practice for Calibrating Scanning
Surface Inspection Systems using Depositions of
Monodisperse Polystyrene Latex Sphere on
Unpatterned Semiconductor Wafer Surfaces
NOTICE: Unless otherwise indicated, all documents
cited shall be the latest published versions.