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SEMI M55-0705 © SEMI 2003, 2004 6 NOTE 8: ASTM F43 is a four-point-probe tech nique wher eas ASTM F673 is an induc tive non-contact met hod. These methods are limited to some 10 2  cm. DIN 50448 is a non-contact cap aci…

SEMI M55-0705 © SEMI 2003, 2004 5

8 Test Methods

NOTE 3: SiC wafers are extremely fragile. While the mechanical dimensions of a wafer can be measured by use of tools such as

micrometer calipers and other conventional techniques, the wafer may be damaged physically in ways that are not immediately

evident. Special care must therefore be used in the selection and execution of measurement methods.

8.1 Test Plan for Crystal Quality within One Crystal  Determine by a method agreed upon between the supplier

and purchaser.

NOTE 4: The assessment of the crystal quality is a problem of great practical impact as it can be very time consuming and costly

or even impossible in the case of destructive test methods to test every wafer. However in general crystal quality does not change

abruptly in a crystal. The evaluation of a subset of all wafers from a given crystal will give sufficient information about the

quality of the whole crystal.

8.2 Polytype  For nominally undoped material (n < 10

/cm

) determine by visual inspection at 77K (liquid

nitrogen) under UV excitation. For doped material (n > 10

/cm

) determine by visual inspection of the colors of the

doped material under diffuse lighting conditions.

8.3 Diameter  Determine by ASTM Test Method F2074.

8.4 Thickness, Center Point  Determine by ASTM Test Method F533.

8.5 Flat Length  Determine by ASTM Test Method F671.

8.6 Bow and Warp  Determine bow in accordance with ASTM Test Method F534 and warp in accordance with

ASTM Test Method F657.

NOTE 5: ASTM has standardized two methods for measuring warp. ASTM Test Method F1390 is an automated, non-contact

method which provides for correction of the wafer deflection due to gravitational effects. The scan pattern covers the entire fixed

quality area. ASTM Test Method F657 is a manual, non-contact method which has a continuous, prescribed scan pattern which

covers only a portion of the wafer surface. There is no provision for correction of the wafer deflection due to gravitational

effects. As noted in Appendix 2, different reference planes are used for the two methods. Because Test Method F657 employs a

back surface reference plane, the measured warp may include contributions from thickness variation of the wafer. Test Method

F1390 employs a median surface reference plane and is not susceptible to interferences from thickness variations. In general,

Test Method F1390 is preferred, especially for wafers 150 mm in diameter and larger.

8.7 Total Thickness Variation  Determine by ASTM Test Method F657.

NOTE 6: ASTM Test Method F533, DIN 50441/1 and JIS H 0611 are all 5 point methods, while Test Method F657 involves a

continuous scan pattern over a portion of the wafer surface and Test Method F1530 involves an automated continuous scan

pattern over the entire wafer surface. JIS H 0611 differs from ASTM Test Method F533 and DIN 50441/1, in that the

measurements in JIS H 0611 are taken at the center and at 5 mm from the edge on diameters parallel and perpendicular to the

primary orientation flat or notch bisector, while the measurements in ASTM Test Method F533 and DIN 50441/1 are taken at the

center and at the same radial distance (R

nominal

-6 mm) on diameters 30° and 120° counterclockwise from the bisector to the

primary orientation flat or notch (with the wafer facing front surface up).

8.8 Surface Polarity  Determine by a method agreed upon between the supplier and the purchaser.

NOTE 7: There are several destructive and non-destructive methods. Most common examples are a chemical etch of the surface

(destructive), by comparing the differently reacting carbon and silicon faces, and wet oxidation (non-destructive) by comparing

the different growth rates on both surfaces by measuring the oxide layer thickness.

8.9 Flat Orientation  Determine by ASTM Test Methods F847.

8.10 Surface Orientation  Determine by ASTM Test Methods F26.

8.11 Orthogonal Misorientation  Determined by a method agreed upon between the supplier and purchaser.

8.12 Surface Defects and Contamination

8.12.1 Visually Observable Surface Defects  Determined by ASTM Practice F523 or a method agreed upon

between the supplier and purchaser.

8.13 Edge Contour  Determine by ASTM Test Method F928.

8.14 Resistivity  For conductive wafers determine by ASTM Test Method F43 or ASTM Test Method F673. For

high-resistivity or semi-insulating material determine by DIN 50448.

SEMI M55-0705 © SEMI 2003, 2004 6

NOTE 8: ASTM F43 is a four-point-probe technique whereas ASTM F673 is an inductive non-contact method. These methods

are limited to some 10

cm. DIN 50448 is a non-contact capacitive method suitable for the range 10

to 10

cm.

8.15 Etch Pit Density  Determine by ASTM Test Method F1404 or a method agreed upon between the supplier

and purchaser.

NOTE 9: ASTM test method F1404 was intended only for use with gallium arsenide. Nevertheless it should serve as a guideline

for determining the etch pit density of silicon carbide.

8.16 Micropipe Density  Determine by a method agreed upon between the supplier and purchaser.

8.17 Crystal Perfection  Determine by a method agreed upon between the supplier and purchaser.

9 Flat System

9.1 For silicon carbide wafers with the surface normal close to the crystallographic c-axis (small tilt angles, see

Figure 2) one primary orientation flat and one secondary flat is specified. The primary flat always has a greater flat

length compared to the secondary flat. (See Figure 6.)

9.2 The angle between primary and secondary flat is always 90° (see Figure 5). For the tolerance see the

appropriate silicon carbide wafer standard.

9.3 The polarity of the wafer surfaces is indicated by the relative flat positions of primary and secondary flat as

shown in Figure 5.

9.4 The edge of the primary flat is always parallel to the [11-20] direction (or, which is the same, parallel to the (1-

100) lattice plane.) For tolerances see the appropriate silicon carbide wafer standard.

9.5 For the exact dimensions of the flat length and the tolerances see the appropriate silicon carbide wafer standard.

10 Standard Defect Limits

10.1 Minimal conditions or dimensions for surface defects are stated below. These limits shall be used for

determining wafer acceptability; anomalies smaller than these limits shall not be considered as defects.

10.2 Surface Defects

10.2.1 edge chip and indent — Any edge anomaly including saw exit marks conforming to the definition (ASTM

F154) and greater than 0.25 mm in radial depth and peripheral length. (See Figure 7.)

10.2.2 orange peel — Any visually detectable roughened surface conforming to the definition (ASTM F154) and

observable under diffused illumination. Pits with a spacing of less than 2 mm are treated as orange peel.

10.2.3 particles — Distinct particles resting on the surface which are revealed under collimated intense light as

bright points.

10.2.4 pit — Any individually distinguishable depression in the surface with a length-to-width ratio smaller than

5:1, visible when viewed under intense illumination.

NOTE 10: This definition is different from ASTM F154 in so far as the slope of the sides of the depression are not taken into

account.

10.2.5 scratch — Any anomaly conforming to the definition (ASTM F154) and having a length-to-width ratio

greater than 5:1 and visible under intense illumination.

10.3 Bulk Defects

10.3.1 crack — Any anomaly conforming to the definition (ASTM F154) and greater than 0.25 mm in total length.

10.3.2 crystallite — Any anomaly conforming to the definition (see §3) and having a misorientation of more than

1° to the main (monocrystalline) part of the wafer and having a maximum width larger than 0.20 mm.

10.3.3 micropipe — Any anomaly conforming to the definition (see §3) and visible by microscopic inspection in

transmission mode at a magnification of 100× or after etching in molten KOH, which will reveal micropipes as

hexagonal structures.

NOTE 11: For microscopic inspection the use of crossed polarisers is recommended. However not all micropipes will be visible

under crossed polarisers.

10.3.4 planar defect — Any anomaly conforming to the definition (see §3) having a maximum width larger than

0.20 mm.

11 Certification

11.1 Upon request of the purchaser in the contract or order, a manufacturer’s or supplier’s certification that the

material was manufactured and tested in accordance with this specification together, with a report of the test results,

shall be furnished at the time of shipment.

11.2 In the interest of controlling inspection costs, the supplier and the purchaser may agree that the material shall

be certified as “capable of meeting” certain requirements. In this context, “capable of meeting” shall signify that the

supplier is not required to perform the appropriate tests in §8. However, if the purchaser performs the test and the

material fails to meet the requirement, the material may be subject to rejection.

12 Packing and Marking

12.1 The wafers supplied under these specifications shall be identified by an individual laser marking consisting of

the supplier assigned lot-number on the backside of each wafer. The laser marking consists of one line of characters

parallel to the primary flat and must be readable with unaided eye. The top of the characters is directed towards the

wafer center. All characters must be completely located within the marking window given in Figure 8. For details

see the appropriate polished Silicon Carbide Wafer Standard.

NOTE 12: SEMI M12 is a standard for the front side marking of silicon wafers and, as a whole, is not applicable to Silicon

Carbide wafers. It is referenced, because some elements of SEMI M12 (see the appropriate polished Silicon Carbide Wafer

Standard) shall also be used for Silicon Carbide.

12.2 Special packing and marking requirements shall be subject to agreement between the supplier and the

purchaser. Otherwise, all wafers shall be handled, inspected, and packed in such a manner as to avoid chipping,

scratches, and contamination in accordance with the best industry practices to provide ample protection against

damage during shipment.

12.3 The wafers shall be identified by appropriately labeling the outside of each box or other container and each

subdivision thereof in which it may reasonably be expected that the wafers will be stored prior to further processing.

Identification shall include as a minimum the nominal diameter, conductive dopant, orientation, resistivity range,

and lot number.

12.4 The lot number, either (1) assigned by the original manufacturer of the wafers, or (2) assigned subsequent to

slice manufacture but providing reference to the original lot number, shall provide easy access to information

concerning the fabrication history of the particular wafers in that lot. Such information shall be retained on file at

the manufacturer's facility for at least 10 years or as negotiated between vendor and user after that particular lot has

been accepted by the purchaser.

13 Related Documents

13.1 ASTM Standards

ASTM F76  Test Methods for Measuring Resistivity and Hall Coefficient and Determining Hall Mobility in

Single-Crystal Semiconductors

ASTM F1241  Terminology of Silicon Technology

13.2 DIN-Standards

DIN 50433/1 — Determination of the Orientation of Single Crystals by Means of X-Ray Diffraction

DIN 50433/3 — Determination of the Orientation of Single Crystals by Means of Laue Back Scattering

DIN 50441/2 — Measurement of the Geometric Dimensions of Semiconductor Wafers: Testing of Edge Profile

DIN 50441/4 — Measurement of the Geometrical Dimensions of Semiconductor Wafers: Slice Diameter, Diameter

Variation, Flat Diameter, Flat Length, Flat Depth