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SEMI M8-0703 © SEMI 1984, 2003 12 NOTICE: SEMI makes no warranties or representations as to the su itability of the standard set forth herein for any particular application . The determinati on of the suitability o f the…

SEMI M8-0703 © SEMI 1984, 2003 11

Item Process Test Wafers

0.18 µm or 0.13 µm Design Rule

6.7 Thickness

Target

Tolerance

SEMI M1

± 25 µm

6.8 Thickness Variation (TTV) Unspecified

6.9 Wafer Surface Orientation {100} ± 1 deg

6.11 Warp SEMI M1

6.12 Sori Unspecified

6.14 Flatness/Site Unspecified

7.0

FRONT SURFACE CHEMISTRY

7.1 Surface Metal Concentration: See Note 1.

8.0

FRONT SURFACE CRITERIA

8.1 A Scratches (macro) – total length None

8.1 B Scratches (micro) – total length

≤ 0.10 × Diameter

8.2 Pits None

8.3 Haze None by Bright Light Inspection

8.4 Localized Light Scatterers See Note 2.

8.5 Contamination/Area None

8.6 Edge Chips None

8.7 Edge Cracks None

8.8 Crack, crows feet None

8.9 Craters None

8.10 Dimples None

8.11 Grooves None

8.12 Mounds None

8.13 Orange Peel None

8.14 Saw Marks None

9.0

BACK SURFACE CRITERIA

9.1 Edge Chips None

9.6 Roughness Unspecified

9.7 Brightness (Gloss) 200 mm

300 mm

Unspecified

SEMI M1.15

9.8 Scratches (macro) – total length

0.5 × diameter

9.9 Scratches (micro) – total length Unspecified

9.10 Localized Light Scatters Unspecified

10.0

OTHER CHARACTERISTICS

TBD

(See Note 3).

Edge Condition Bright Etched or Polished

NOTE 1: Test wafers are cleaned according to a defined prime wafer supplier process, with a stated capability for removable LLS. Test wafer

characteristics are defined to be the “unsorted” process capability for these parameters and accordingly, will not be sorted. Products needing

special LLS requirements should be described by SEMI M24 criteria.

NOTE 2: Test wafers are cleaned according to a defined prime wafer supplier process, with a stated capability for surface metals. Test wafer

characteristics are defined to be the “unsorted” process capability for these parameters and accordingly, will not be sorted. Products needed

special surface metal requirements should be described by SEMI M24 criteria.

NOTE 3: The A revision to SEMI M18 to provide this designation item number is in process being developed. When the this revision to SEMI

M18 is completed, this document specification will be revised to include the assigned item number from SEMI M18 designation.

SEMI M8-0703 © SEMI 1984, 2003 12

NOTICE: SEMI makes no warranties or representations as to the suitability of the standard set forth herein for any

particular application. The determination of the suitability of the standard is solely the responsibility of the user.

Users are cautioned to refer to manufacturer’s instructions, product labels, product data sheets, and other relevant

literature respecting any materials mentioned herein. These standards are subject to change without notice.

The user’s attention is called to the possibility that compliance with this standard may require use of copy-righted

material or of an invention covered by patent rights. By publication of this standard, SEMI takes no position

respecting the validity of any patent rights or copyrights asserted in connection with any item mentioned in this

standard. Users of this standard are expressly advised that determination of any such patent rights or copyrights, and

the risk of infringement of such rights, are entirely their own responsibility.

International), 3081 Zanker Road, San Jose, CA 95134. Reproduction o

the contents in whole or in part is forbidden without express written

consent of SEMI.

SEMI M9-0999 © SEMI 1986, 19991

SEMI M9-0999

SPECIFICATIONS FOR POLISHED MONOCRYSTALLINE GALLIUM

ARSENIDE SLICES

NOTE: This specification was modified in September 1999 to correct an editorial error present in Figure 4A.

A Publication Improvement Proposal (PIP) form was submitted in August 1999.

1 Preface

1.1 These specifications cover two groups of substrate

requirements for monocrystalline high-purity gallium

arsenide wafers used in semiconductor and electronic

device manufacture. Dimensional and crystallographic

orientation characteristics and limits on surface defects

are the only standardized properties set forth below.

1.2 A complete purchase specification may require

that additional physical, electrical, and bulk properties

be defined. These properties are listed, together with

test methods suitable for determining their magnitude

where such procedures are documented.

1.3 These specifications are directed specifically to

gallium arsenide wafers with one or both sides

polished. Unpolished wafers or wafers with epitaxial

films are not covered; however, purchasers of such

wafers may find these specifications helpful in defining

their requirements.

1.4 The material is Single Crystal Gallium Arsenide

(GaAs) having a cubic zinc blende structure and having

the following properties. The following properties are

for use as guidelines:

Density 5.316 gm/cm

Melting Point

1238°C

Dielectric Constant 13.1

Lattice Parameter 5.654 Å

Energy Gap 1.42 eV

1.5 For reference purposes, SI (System International,

commonly called metric) units shall be used.

2 Applicable Documents

2.1 ASTM Standards

E 122  Practice for Choice of Sample Size to

Estimate Average Quality of a Lot or Process

F 26  Test Methods for Determining the Orientation

of a Semiconductive Single Crystal

1 American Society for Testing and Materials, 100 Barr Harbor

Drive, West Conshohoken, PA 19428-2959 (All cited standards

except for E 122 may be found in Volume 10.05 of the Annual Book of

ASTM Standards; E 122 may be found in Volume 14.02.)

F 76  Test Methods for Measuring Hall Mobility and

Hall Coefficient in Extrinsic Semiconductor Single

Crystals

F 154  Practices and Nomenclature for Identification

of Structures and Contaminants Seen on Specular

Silicon Surfaces

F 523  Practice for Unaided Visual Inspection of

Polished Silicon Slices

F 533  Test Method for Thickness and Thickness

Variation of Silicon Slices

F 534  Test Method for Bow of Silicon Slices

F 613  Test Method for Measuring Diameter of

Silicon Slices and Wafers

F 657  Test Method for Measuring Warp and Total

Thickness Variation on Silicon Slices and Wafers by a

Non-Contact Scanning Method

F 671  Test Method for Measuring Fiducial Flat

Length and Deviation

F 928  Test Method for Edge Contour of Silicon

Wafers

2.2 Other Standard

ANSI/ASQC Z1.4-1993  Sampling Procedures and

Tables for Inspection by Attributes

3 Definitions

3.1 Bow  of a semiconductor slice or wafer, a

measure of concave or convex deformation of the

median surface of a slice or wafer, independent of any

thickness variation which may be present. Bow is a

bulk property of the test specimen, not a property of an

exposed surface. Generally, bow is determined with a

test specimen in a free, unclamped condition. Units of

bow are generally micrometers or inches.

3.2 Dopant  a chemical element, usually from the

second, fourth, or sixth columns of the periodic table

for the case of III-V compounds, incorporated in trace

amounts in a semiconductor crystal to establish its

conductivity type and resistivity.

2 American Society for Quality Control, 611 East Wisconsin Avenue,

Milwaukee, WI 53202