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SEMI E78-1102 © SEMI 1998, 2002 1 SEMI E78-1102 ELECTROSTATIC COMPATIBILIT Y - GUIDE TO ASSESS AND CONTROL ELECTROSTATIC DISCHARGE (ESD) AND ELECTROSTATIC AT TRACTION (ESA) FOR EQUI PMENT This guide was technically appro…

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SEMI E77-1104 © SEMI 1998, 2004 10
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ISA S51.1 — Process Instrumentation Terminology
16.4 MIL-STD
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SEMI E78-1102 © SEMI 1998, 2002 1
SEMI E78-1102
ELECTROSTATIC COMPATIBILITY - GUIDE TO ASSESS AND
CONTROL ELECTROSTATIC DISCHARGE (ESD) AND
ELECTROSTATIC ATTRACTION (ESA) FOR EQUIPMENT
This guide was technically approved by the Global Metrics Committee and is the direct responsibility of the
North American Metrics Committee. Current edition approved by the North American Regional Standards
Committee on August 29, 2002. Initially available at www.semi.org September 2002; to be published
November 2002. Originally published September 1998.
1 Purpose
1.1 The purpose of this document is to minimize the
negative impact on productivity caused by static charge
in semiconductor manufacturing environments. It is a
guide for establishing electrostatic compatibility of
equipment used in semiconductor manufacturing.
1.2 Electrostatic surface charge causes a number of
undesirable effects in semiconductor manufacturing
environments. Electrostatic discharge (ESD) damages
both products and reticles. ESD events also cause
electromagnetic interference (EMI), resulting in
equipment malfunctions. Charged wafer and reticle
surfaces attract particles (electrostatic attraction or
ESA) and increase the defect rate. Charge on products
can also result in equipment malfunction or product
breakage. Operating problems and additional product
defects due to static charge can have a negative impact
on the cost of ownership of semiconductor
manufacturing equipment (refer to SEMI E35).
1.3 An increasing amount of semiconductor production
is done in minienvironments or within the production
equipment. The majority of static related problems
occur while the product is in its carriers, or being
transferred from them, by the production equipment.
1.4 Static control methods can be incorporated in the
equipment design to reduce static charge to acceptable
levels. This guide will be used primarily by equipment
manufacturers during the design of their equipment.
There are test methods available (see Sections 6 and 7
of this guide) to demonstrate the effectiveness of the
static control methods. The end user will be able to use
the same test methods to verify compliance with an
equipment purchase specification.
2 Scope
2.1 The scope of this document is limited to methods
of measurement and a guide for the maximum
recommended level of static charge on:
Product or reticles,
Carriers, and
Parts of the input/exit ports of equipment and
minienvironments.
2.2 This document presents a matrix of maximum
recommended levels of static charge on products,
reticles, carriers, and the input and exit ports of
production equipment or minienvironments. The
purpose is to:
Reduce product, reticle, and equipment damage
due to ESD,
Reduce equipment lock-up problems due to ESD
events, and
Reduce the attraction of particles to charged
surfaces.
2.3 This document references SEMI E43 and other
methods of measuring static charge. Related
Information 1 of this document contains a theoretical
investigation of electrostatic particle attraction, as well
as case histories from users and equipment
manufacturers as to the static charge problems
encountered and how they were solved. A bibliography
of related technical papers is also included. Related
Information 2 describes static control methods
commonly used in semiconductor manufacturing.
2.4 This standard does not purport to address safety
issues, if any, associated with its use. It is the
responsibility of the users of this standard to establish
appropriate safety health practices and determine the
applicability or regulatory limitations prior to use.
3 Limitations
3.1 Static Measurements — Measurements of
electrostatic quantities such as charge, electric field,
and voltage are difficult to make. The nature of the
object (insulator or conductor), its geometry, its
surroundings, and the measuring equipment itself, are
only a few of the factors affecting the accuracy of an
electrostatic measurement.
3.1.1 Similarly, it is difficult to relate the measurement
of an electrostatic quantity to its effect on products or
equipment. For example, an ESD simulator produces a
standardized discharge waveform when a capacitor is
SEMI E78-1102 © SEMI 1998, 2002 2
discharged at a known voltage. This device is used to
establish the ESD damage threshold for semiconductor
products, or the effect of ESD on equipment. While the
amount of charge transferred is known (q = CV), the
maximum current that results is not. There is no
guarantee that the same amount of charge would
produce the same results if different values of
capacitance and voltage were used.
3.2 Location The test methods and maximum
recommended levels of static charge on product,
reticles, and carriers are meant to be applied at the
input/exit ports of production equipment, and when
possible within the equipment. This document is not
meant to be applied in any way that affects the process
within the equipment.
3.3 Test Methods — The test methods referenced in
this document do not guarantee precise measurements
of static charge levels. The maximum static charge
levels recommended in this document have large
tolerances. (See Section 15.1.)
3.4 Static Charge Control — There are a variety of
static related issues in a semiconductor manufacturing
environment. The issues are complex due to the wide
range of electrostatic problems, and device or
equipment sensitivities to these problems. This guide
contains general recommendations. Users of this
document are cautioned that specific static related
problems may require or allow different levels of static
charge than are recommended in this document.
4 Referenced Standards
4.1 SEMI Standards
SEMI E10 — Standard for Definition and Measurement
of Equipment Reliability, Availability, and
Maintainability (RAM)
SEMI E33 — Specification for Semiconductor
Manufacturing Facility Electromagnetic Compatibility
SEMI E35 — Cost of Ownership for Semiconductor
Manufacturing Equipment Metrics
SEMI E43 — Guide for Measuring Static Charge on
Objects and Surfaces
4.2 ESD Association Standards and Advisories
1
ESD STM5.1 — Sensitivity Testing – Human Body
Model (HBM) - Component Level
ESD ADV1.0 — Glossary of Terms
1 ESD Association, 7900 Turin Road, Rome, NY 13440
ESD ADV 2.0 — Advisory for Protection and
Sensitivity Testing of Electrostatic Discharge
Susceptible Items - Handbook
ANSI/ESD STM5.3.1 — Sensitivity Testing - Charged
Device Model (CDM) - Component Level
ANSI/ESD STM5.2 — Sensitivity Testing -- Machine
Model (MM) - Component Level
4.3 Other Documents
IEC/TS 61000-4-2 — Transient Immunity Standard,
International Electrotechnical Commission (IEC)
2
89/336/EEC — European Union Directive on
Electromagnetic Compatibility
NOTE 1: As listed or revised, all documents cited shall be the
latest publications of adopted standards.
5 Terminology
5.1 Definitions
5.1.1 deposition velocity — Particle flux to a surface
(number of particles deposited per unit area per unit
time) divided by the particle concentration adjacent to
the surface boundary layer.
5.1.2 electromagnetic interference (EMI) — Any
electrical signal in the non-ionizing (sub-optical)
portion of the electromagnetic spectrum with the
potential to cause an undesired response in electronic
equipment.
5.1.3 electrostatic attraction (ESA) — The force
between two or more oppositely charged objects. The
result is increased deposition rate of particles onto
charged surfaces, or movement of charged materials.
5.1.4 electrostatic compatibility — Charge control
adequate for interequipment transfer of products,
reticles, and carriers without electrostatic problems.
5.1.5 electrostatic discharge (ESD) — The rapid
spontaneous transfer of electrostatic charge induced by
a high electrostatic field.
NOTE 2: Usually the charge flows in a spark between two
objects at different electrostatic potentials.
5.1.6 equipment interrupt — Any variance from the
specifications of equipment operation, whether or not
the equipment recovers automatically. Interrupts
include, but are not limited to, equipment stoppage,
equipment data errors, and physical mishandling of
products (reference SEMI E10).
5.1.7 ESD simulator — An instrument providing a
specified electrostatic discharge current waveform
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