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SEMI M9-0999 © SEMI 1986, 1999 4 shall be certified as “ capable of meeting” certain requirements. In this context, “capable of meeting” shall signify that the s upplier is not required to perform the appropr iate tests …

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SEMI M9-0999 © SEMI 1986, 19993
5.2.1 When the wafer is aligned with the SEMI Wafer
Edge Profile Template (see Figure 6) so that the x-axis
of the template is coincident with the wafer surface and
the y-axis of the template is tangent with the outermost
radial portion of the contour, the wafer edge profile
must be contained within the clear region of the
template. (See Figure 7 for example of acceptable and
unacceptable contours.)
5.2.2 No sharp points or protrusions are permitted
anywhere on the wafer edge contour.
5.2.3 Cosmetic attributes of the edge contour are not
covered by this specification. They shall be agreed
upon between supplier and purchaser.
6 Materials and Manufacture
6.1 The material shall consist of wafers from ingots
grown to the material definition specified in the
purchase order or contract.
7 Physical Requirements
7.1 The material shall conform to the crystallographic
orientation details as specified in the applicable
polished gallium arsenide slice standard.
7.2 The material shall conform to the details specified
in the purchase order or contract as follows:
7.2.1 Conduction Type,
7.2.2 Dopant,
7.2.3 Carrier Concentration,
7.2.4 Resistivity,
7.2.5 Thermal Conversion Characteristics,
7.2.6 Etch Pit Density,
7.2.7 Mobility,
7.2.8 Surface Characteristics,
7.2.9 Growth Methods.
8 Sampling
8.1 Unless otherwise specified, Practice E 122 shall be
used. When so specified, appropriate sample sizes shall
be selected from each lot in accordance with
ANSI/ASQC Z1.4. Each quality characteristic shall be
assigned an acceptable quality level (AQL) or lot total
percent defective (LTPD) value in accordance with
ANSI/ASQC Z1.4 definitions for critical, major and
minor classifications. If desired and so specified in the
contract or order, each of these classifications may
alternatively be assigned cumulative AQL or LTPD
values. Inspection levels shall be agreed upon between
the supplier and the purchaser.
9 Test Methods
9.1 Diameter Determine by ASTM Test Method F
613.
9.2 Thickness, Center Point Determine by ASTM
Test Method F 533.
NOTE 2 GaAs wafers are extremely fragile. While
the mechanical dimensions of a slice can be measured
by use of tools such as a micrometer calipers and other
conventional techniques, the slice may be damaged
physically in ways that are not immediately evident.
Special care must therefore be used in the selection and
execution of measurement methods.
9.3 Flat Length Determine by ASTM Test Method
F 671.
9.4 Flat Orientation Determine by etching method
identified in the appropriate polished GaAs wafer
standard.
9.5 Bow and Warp Determine bow in accordance
with ASTM Test Method F 534 and warp in accordance
with ASTM Test Method F 657.
9.6 Total Thickness Variation Determine by ASTM
Test Method F 533 or F 657.
9.7 Surface Orientation Determined by ASTM Test
Methods F 26.
9.8 Orthogonal Misorientation Determined by a
method agreed upon between the supplier and
purchaser.
9.9 Surface Defects and Contamination
Determined by a method agreed upon between the
supplier and purchaser.
9.10 Mobility Determined by ASTM Test Methods
F 76.
9.11 Crystal Perfection Determined by a method
agreed upon between the supplier and purchaser.
10 Standard Defect Limits
10.1 Determined by agreement between supplier and
purchaser as to limits.
11 Certification
11.1 Upon request of the purchaser in the contract or
order, a manufacturer’s or supplier’s certification that
the material was manufactured and tested in accordance
with this specification together, with a report of the test
results, shall be furnished at the time of shipment.
11.2 In the interest of controlling inspection costs, the
supplier and the purchaser may agree that the material
SEMI M9-0999 © SEMI 1986, 1999 4
shall be certified as “capable of meeting” certain
requirements. In this context, “capable of meeting”
shall signify that the supplier is not required to perform
the appropriate tests in Section 9. However, if the
purchaser performs the test and the material fails to
meet the requirement, the material may be subject to
rejection.
12 Packing and Marking
12.1 Special packing and marking requirements shall
be subject to agreement between the supplier and the
purchaser. Otherwise, all wafers shall be handled,
inspected, and packed in such a manner as to avoid
chipping, scratches, and contamination in accordance
with the best industry practices to provide ample
protection against damage during shipment.
12.2 The wafers supplied under these specifications
shall be identified by appropriately labeling the outside
of each box or other container and each subdivision
thereof in which it may reasonably be expected that the
wafers will be stored prior to further processing.
Identification shall include as a minimum the nominal
diameter, conductive dopant, orientation, resistivity
range, and lot number.
12.3 The lot number, either (1) assigned by the
original manufacturer of the wafers, or (2) assigned
subsequent to slice manufacture but providing reference
to the original lot number, shall provide easy access to
information concerning the fabrication history of the
particular wafers in that lot. Such information shall be
retained on file at the manufacturer’s facility for at least
one month or as negotiated between vendor and user
after that particular lot has been accepted by the
purchaser.
Table 1. Equivalent Orientations
V-Groove Option
Surface orientation:
)100()100(
)001( )001(
Primary flat location:
)101( )110( )110(
)011(
Secondary flat location:
)011(
)110(
)110(
)101(
For Surface orientation B, the off-
orientation tilt direction is toward:
)110(
)011( )011( )101(
Table 2. Equivalent Orientations
Dove-Tail Option
Surface orientation:
)100()100(
)001( )001(
Primary flat location:
)110(
)011(
)101(
)110(
Secondary flat location:
)110(
)101(
)011(
)110(
For Surface orientation B, the off-
orientation tilt direction is toward:
)011(
)110(
)101( )011(
The symmetry of GaAs crystal structure allows other Miller indices to be used for identifying surface and flat orientations. This
table lists various possibilities which meet the requirements for the above two options.
NOTE: For V-Groove Option, the relative directions in a single column must be maintained. For Dove-Tail Option, any of the
110 tilt directions are considered equivalent.
SEMI M9-0999 © SEMI 1986, 19995
Figures 1A and 1B
Both Diagrams Show a GaAs Wafer with Surface Orientation A and Flat Option V-Groove