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SEMI M1-0305 © SEMI 1978, 2005 48 R2-7.14 Site Flatness is generally determined by SEM I MF1530 (see Not e 1, above). The m ost commonly used site flatness parameter is SFQR; other site flatness paramet ers are discussed…

SEMI M1-0305 © SEMI 1978, 2005 47

R2-7.2 Flat Length should be determined by SEMI MF671. If flat diameter is specified instead of flat length, it can

be determined by ¶6.2.1 of DIN 50441/4 or by a dial gauge method as agreed upon between the supplier and

customer. Both SEMI MF671 and DIN 50441/4 take account of the possibility that the ends of the flat might be

rounded.

R2-7.3 Notch Dimensions should be determined by SEMI MF1152 (see Figure 5).

R2-7.4 Flat Orientation can be confirmed by SEMI MF847. There is no standardized method for determining the

crystallographic orientation of the diameter that bisects the notch.

R2-7.5 Edge Profile is usually determined by using one of the two templates (see Figure 6) with Method B of SEMI

MF928 or Procedure 2 of DIN 50441/2, both of which are nondestructive. The other two procedures in these

methods are destructive and not so widely used.

R2-7.6 Thickness is usually determined at the center point of the wafer with the use of SEMI MF1530, an

automated technique. Manual techniques originally used in the industry include SEMI MF533, JIS H 0611, and

DIN 50441/1.

NOTE 2: Test methods SEMI MF1530 (for thickness, thickness variation, and flatness), SEMI MF1451 (for sori), and SEMI

MF1390 (for warp) may not be suitable for use on large diameter wafers with polished back surfaces. New standardized test

methods for measuring these parameters on such wafers are under development.

R2-7.7 Total Thickness Variation (TTV) was originally determined with the use of manual 5-point techniques

covered in SEMI MF533, JIS H 0611, and DIN 50441/1. JIS H 0611 differs from SEMI MF533 and DIN 50441/1,

in that the measurements in JIS H 0611 are taken at the center and at 5 mm from the edge on diameters parallel and

perpendicular to the primary flat or notch bisector, while the measurements in SEMI MF533 and DIN 50441/1 are

taken at the center and at 6 mm from the edge on diameters 30 degrees and 120 degrees counterclockwise from the

bisector to the primary flat or notch (with the wafer facing front surface up). TTV can also be determined with the

use of SEMI MF657, which involves a continuous scan pattern over a portion of the wafer surface. Currently,

however, it is most frequently determined using SEMI MF1530, which involves an automated continuous scan

pattern over the entire wafer surface. In this case, the quantity determined is equal to the global flatness GBIR (see

Appendix 1 and Note 1, above).

R2-7.8 Surface Orientation can be determined by the x-ray methods of SEMI MF26, JEITA EM-3501, or DIN

50433/1, the optical method of SEMI MF26 or DIN 50433/2, or the Laue method of DIN 50433/3.

R2-7.9 For off-orientation {111} wafers, the orthogonal misorientation is specified for each of the wafer categories

in Tables 4 through 9. There is no standardized measurement method for this property so it should be determined by

a method agreed upon between supplier and customer.

R2-7.10 Bow can be determined with the manual methods SEMI MF534 and JIS H 0611. Currently, bow is not as

widely used a parameter as warp.

R2-7.11 Warp is currently most often measured with the use of SEMI MF1390, which is an automated method with

full surface scan and correction for gravitational sag. It can also be measured with the use of the contactless manual

method SEMI MF657, in which the prescribed scan pattern covers only a portion of the wafer surface in which there

is no correction for gravitational sag. As noted in Appendix 2, different reference planes are used for the two

methods. Because SEMI MF657 employs a back surface reference plane, the measured warp may include

contributions from thickness variation of the wafer. SEMI MF1390 employs a median surface reference plane and

is not susceptible to interferences from thickness variations. In general, the latter is preferred, especially for wafers

150 mm in diameter and larger (see Note 1, above).

R2-7.12 Sori , which is sometimes specified in lieu of bow or warp or both, can be determined by SEMI MF1451

(see Note 1, above).

R2-7.13 Global Flatness can be determined by either capacitance measurements, as in SEMI MF1530, or by

multiple beam interference, as in DIN 50441/3. Generally, the former is considered to be more reliable, especially

as the need increases for measuring smaller flatness deviation (see Note 1, above). As noted in ¶R2-7.7, GBIR is the

same as TTV; other global flatness parameters are discussed in Appendix 1.

SEMI M1-0305 © SEMI 1978, 2005 48

R2-7.14 Site Flatness is generally determined by SEMI MF1530 (see Note 1, above). The most commonly used

site flatness parameter is SFQR; other site flatness parameters are discussed in Appendix 1. Although it is not

widely used, the scanning site flatness parameter SFSR was recently introduced. For this parameter, use a subsite

width, Wss, equal to 8 mm and orient the wafer so the effective scan direction is along the wafer’s y-axis as defined

in SEMI M20.

R2-7.14.1 SEMI M49 is a guide for specifying test equipment for use in determining thickness, shape, and flatness

parameters on wafers intended to be used to fabricate advanced integrated circuits.

R2-7.15 Nanotopography should be determined by SEMI M43. This guide gives a variety of options that can be

used, so it is essential to specify the various conditions that are desired in any given case. The conditions chosen

should be agreed upon between supplier and customer.

R2-8 Front Surface Chemistry

R2-8.1 Surface Metal Contaminants

R2-8.1.1 Sodium, aluminum, potassium, and iron can be measured by secondary ion mass spectrometry (SIMS),

inductively coupled plasma mass spectrometry (ICP/MS), or atomic absorption spectroscopy (AAS). SIMS has

been standardized as SEMI MF1617. The latter two methods are frequently combined with vapor phase

decomposition (VPD), but they have not yet been standardized.

R2-8.1.2 Potassium, chromium, iron, nickel, copper, and zinc can be measured by Total Reflection X-Ray

Fluorescence Spectroscopy (TXRF), ICP/MS, and AAS. TXRF has been standardized both with (SEMI M33 and

ISO 17706) and without (ISO 14706) use of VPD to preconcentrate the surface metal contaminants.

R2-8.1.2.1 VPD is chemical preconcentration of the surface metals using vapor phase HF to decompose the surface

native oxide and a water (or acid-spiked water) droplet to scan across the wafer dissolving the surface metals. The

recovery rate of this preconcentration method is dependent upon the chemistry of the surface metals and upon the

chemistry used for the preconcentration. An alternative preconcentration method to VPD is to scan an acid droplet

across the wafer surface.

R2-8.1.2.2 VPD/AAS is a single-element technique which is widely used in Japan. It is element-specific and very

sensitive. VPD/ICP-MS is a rapid multi-element technique which is a more recent development. It is also very

sensitive, but its reproducibility is dependent upon the injection process into the ICP-MS. VPD/TXRF is an even

more recently developed multi-element technique. It is also very sensitive, but its reproducibility is dependent on

the residue-drying process.

R2-8.2 Surface Organics can be measured by SEMI MF1982. This standard describes two methods; the method to

be utilized should be agreed upon between supplier and customer.

R2-9 Surface Inspection Characteristics

R2-9.1 Visual Inspection of either the front or back surface of wafers can be carried out in accordance with SEMI

MF523 or JIS H 0614. The following conditions should be used for examination under high intensity illumination:

 Background light intensity: 8 ± 2 fc (86 ± 22 lux),

 Angle (alpha): 45 ± 10, and

 Angle (beta): 90 ± 10.

See ¶6.8 for a discussion of which artifacts on the surface should be considered as defects. SEMI MF154 is a useful

guide for identifying structures and contaminants seen on silicon surfaces.

R2-9.1.1 Scratches—In inspecting for scratches, it is important to note that while macro-scratches can be seen under

both high intensity and diffuse illumination, micro-scratches can be seen only under high intensity illumination.

Therefore, to separate the two kinds of scratches, it is necessary to count the scratches observed under both kinds of

illumination. The count of scratches seen under diffuse illumination is the number of macro-scratches while the

difference of the counts seen under high intensity illumination and diffuse illumination is the number of micro-

scratches. Of course, if the total requirement is for no scratches of either kind, then examination under high

intensity illumination only is adequate.

R2-9.2 X-ray Topography (DIN 50443/1) can also be used to test for defects in silicon wafers. This method may

see defects that do not intersect the surface, and can also be used to examine for bulk defects in the wafer (see

Section 2.4.10 of Table 1).

R2-9.3 Automated Surface Inspection by Light Scattering can also be used to detect many surface defects,

especially on polished surfaces. These techniques have not been fully standardized but there is a group of standards

that assist in making certain that the instruments are performing correctly. These include SEMI M52 for

determining if surface scanning inspection systems (SSIS) have suitable characteristics for the desired use, SEMI

M53 for calibrating SSISs, SEMI M58 for assuring that the calibration artifacts meet the desired requirements,

SEMI M50 for determining capture rate characteristics of SSISs and SEMI M35 for discriminating among various

surface features with an SSIS. Because of the lack of complete standardization, the testing conditions for use of

SSISs should be agreed upon between supplier and customer.

R2-9.3.1 Localized Light Scatterers — SSISs are particularly appropriate for inspecting polished surfaces for the

presence of particles and other localized light scatterers (LLS). In this case, it is essential to define the size ranges

(in units of latex sphere equivalents, LSE) as well as the maximum permissible counts, usually in terms of counts

per wafer, but occasionally in terms of counts per unit area.

R2-9.4 Surface Roughness affects the size of particle or other LLS that can be detected on a surface. SEMI M40

provides guidance on how to measure and report surface roughness on planar surfaces. Surface microroughness can

be determined with SSISs, through the use of the power spectral density as described in SEMI MF1811, or with an

atomic force microscope, which can be calibrated with the use of JEITA EM-3505. Other documents useful in

connection with surface microroughness measurements include ISO 4287/1 and ANSI/ASME B46.1. Because of

the lack of standardization, the testing conditions for surface microroughness measurements should be agreed upon

between supplier and customer.

R2-9.5 Back Surface Finish of 300 mm diameter wafers is specified as “polished.” The standard quantitative test

for the polish finish, which is not a smooth as the mirror polished front surface, is gloss. The general techniques for

determining gloss are given in ASTM Test Method D 523 and JIS Z 8741. However, for measuring gloss of silicon

surfaces, visible illumination at a 60 angle of incidence is referenced to a mirror polished silicon front surface.

Surface microroughness measurements (see ¶R2-9.4) can also be used as a quantitative test for back surface finish,

especially when it is necessary to observe particles or other LLSs smaller than 0.25 m LSE on the surface.

NOTICE: SEMI makes no warranties or representations as to the suitability of the standards set forth herein for any

particular application. The determination of the suitability of the standard is solely the responsibility of the user.

Users are cautioned to refer to manufacturer's instructions, product labels, product data sheets, and other relevant

literature, respecting any materials or equipment mentioned herein. These standards are subject to change without

notice.

By publication of this standard, Semiconductor Equipment and Materials International (SEMI) takes no position

respecting the validity of any patent rights or copyrights asserted in connection with any items mentioned in this

standard. Users of this standard are expressly advised that determination of any such patent rights or copyrights, and

the risk of infringement of such rights are entirely their own responsibility.