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SEMI E78-1102 © SEMI 1998, 2002 18 Table R1-2 Tolerable Le vels of Electrostatic Field at a Distance of One Radius from the Center of a Wafer, Assuming a Fuchs Charge Distribution on the Particles Minimum Particle Di ame…

SEMI E78-1102 © SEMI 1998, 2002 17

at a distance r = R from the center of the wafer.

R1-2.2.2.4 For a conductive wafer, or for a wafer with

localized regions of charge, the electric field will vary

over the surface, causing greater and lesser deposition

velocities. A conductive wafer will have the charge

concentrated near the edges, producing a relatively high

field there and much lower fields as the center is

approached.

R1-2.2.2.5 Note that both E

and E

are proportional to

Q and therefore, other variables being equal,

electrostatic deposition is expected to be proportional to

Q. Thus, the criterion to be specified is not the tolerable

charge on the wafer but the tolerable electrostatic field

near the wafer surface (such as that evaluated at a

distance of one radius perpendicular to the wafer

surface above its center), E

. A maximum tolerable

value of E

will be estimated by calculating the

maximum E

values for which v

elect

< v

diff

, assuming a

Fuchs distribution for the particle charge.

R1-2.3 Tolerable Electrostatic Field

R1-2.3.1 Particle Deposition Velocity Attributable to

Convective Diffusion (vdiff) — In a microelectronics

cleanroom, airflow is generally laminar

(“unidirectional”) downward at about 50 cm/sec (100

ft/min). If the flow is perpendicular to a surface, such as

a wafer of diameter, Dw, a boundary layer forms across

which particles diffuse to the surface. Liu and Ahn

(1987) adapted the correlation of Sparrow and Geiger

(1985) and obtained a correlation for the average

diffusive deposition velocity as:

diff

= 1.08 Sc

D * D

(7)

where Sc =

D * is the Schmidt Number

is the gas viscosity

is the gas density

and D*= kTB is the particle diffusivity

k is the Boltzmann constant

T is the absolute temperature and

B is the particle mobility

and Re =

is the Reynolds number

U is the gas velocity and

is the wafer diameter

Bae et al. (1994) reviewed the experimental work of

others and presented their own, supporting this

correlation; Cooper et al. (1990) obtained a similar

equation by a somewhat different method. Oh et al.

(1996) summarized prior experimental and theoretical

work and extended the numerical analysis with a

turbulent transport properties model, finding a small

increase in deposition for the conditions modeled.

These authors’ publications support the approximation

that the diffusional deposition velocity is about 0.006

cm/sec at particle diameter of 0.25 µm and about 0.03

cm/sec at particle diameter of 0.01 µm, or:

diff

(0.03 cm / sec)/(d /0.01

(8)

for 0.01 µm ≤ d ≤ 0.3 µm in cleanroom air.

R1-2.3.2 Particle Deposition Velocity Attributable to

Electrostatic Forces (v

elect

) — Using a power law to

approximate the Fuchs particle charge distribution

yields the following approximation for electrical

mobility (Cooper et al., 1990):

(0.002 cm /

)/(d /0.01

m)(1 V / cm) (9)

from which the deposition velocity attributable to

electrostatic forces becomes:

elect

(0.002 cm

)[

cm)]/(d

0.01

m) (10)

Setting v

elect

diff

= 1 results in the following expression

for tolerable E

[(E

/(V /cm)]

15 [d /(0.01

m)]

(11)

Table R1-2 lists the values of tolerable electrostatic

field adjacent to a wafer surface as calculated from

Equation (11). Note that the electrostatic fields are

calculated at a distance of one wafer radius from the

center of the wafer. E

is the value of electric field at

which electrostatically enhanced particle deposition is

estimated to match the particle deposition velocity

attributable to diffusion, assuming a Fuchs charge

distribution on the particles. This charge distribution

represents a minimal particle charge. With most particle

charge distributions to be encountered in practice, even

lower values of electrostatic fields will produce

enhanced deposition. A safe conclusion is that there is

no safe value of electrostatic field that will avoid

enhanced particle deposition unless neutralization of

particle charge has been achieved, in which case the

very modest values of electrostatic fields calculated

from Equation (11) and tabulated in Table Rl-2 should

be tolerable.

SEMI E78-1102 © SEMI 1998, 2002 18

Table R1-2 Tolerable Levels of Electrostatic Field at

a Distance of One Radius from the Center of a

Wafer, Assuming a Fuchs Charge Distribution on

the Particles

Minimum Particle Diameter d in

µm

Tolerable Field E

, in

Volts/cm

0.01 15

0.02 21

0.03 26

0.05 34

0.10 47

0.20 67

0.30 82

R1-2.4 Conclusions — As indicated in Table R1-2, the

calculated value of tolerable electrostatic field (the

value of electrostatic field above which electrostatic

particle deposition becomes the dominant mechanism

of particle deposition) is just 47 V/cm for particles of

0.1 µm diameter when the particle electrical charge is

that described by the Fuchs charge distribution, a

minimum value of particle charge that is normally

exceeded in most environments. In most realistic

environments the particle charge will be greater and the

tolerable electrostatic field, even lower. Hence the

conclusion that in all practical processing environments

electrical forces will be the dominant mechanism of

particle deposition on wafers.

R1-2.4.1 In a Federal Standard 209E Class 1

environment (c ≤ 0.00124 particles/cm

) with v

elect

, ~

0.01 cm/s (the value predicted by Equation 10 for a 0.1

µm particle in an electric field of 47 Volts/cm) the

target areal particle densities (N/A = 0.016 particles/cm

for the 0.25 µm technology of 1998) specified in the

National Technology Roadmap for Semiconductors

(NTRS, 1994) will be reached after an exposure time of

about 1300 seconds, assuming c is at its maximum

allowed concentration.

R1-2.4.2 With less favorable electrical conditions, or

higher particle concentration, the maximum allowed

exposure time becomes shorter. In addition, the target

values for N/A continue to decrease with each

technology generation. Fortunately, one or more of the

parameters, particle concentration in the ambient, the

charge level on a surface, or the time a charged surface

is exposed to a given particle ambient, can be

controlled.

R1-2.4.3 Charge Neutralization — Achieving the

Fuchs charge distribution by means of radioactive

isotopes or balanced corona neutralizers — is the first

step in controlling particle deposition on wafers. This

step, while clearly necessary, is unlikely to be sufficient

to guarantee meeting the NTRS requirements of the

future. Steps to minimize environmental particle

concentration, c, and time of exposure, t, will have to be

part of the strategy for creating acceptable processing

environments. Minimizing these variables reduces

particle deposition attributable to all mechanisms, not

just electrostatic deposition.

R1-2.4.4 Contemporary standards recognize the need

for reduced particle concentrations in wafer

environments. For example, the classification ISO Class

1 (of the proposed international standard for classifying

cleanrooms according to concentration of airborne

particulate cleanliness) describes an environment in

which the concentration of particles > 0.1 µm is 10

-5

particles/cm

or less. In an environment of this quality,

wafer exposure can be as long as 10

seconds at the

deposition velocity predicted for neutralized 0.1 µm

particles (~0.01 cm/s) and still meet the target defect

density that the NTRS recommends for the 0.1 µm

technology anticipated in 2007. Fractional increases in

the electric field above 47 Volts/cm will decrease the

allowed exposure time by that same fraction (Equations

10, 12) — an electric field of 94 Volts/cm reduces the

allowed exposure time to 5 × 10

seconds, etc.

R1-2.5 References

Bae, G.N., Lee, C. S., and Park, S. O., “Measurement of

Particle Deposition Velocity Toward a Horizontal

Semiconductor Wafer by Using a Wafer Surface

Scanner”, Aerosol Science Technology 21: p. 72–82

(1994)

Cooper, D. W., Miller, R. J., Wu, J. J., and Peters, M.

H., “Deposition of Submicron Aerosol Particles During

Integrated Circuit Manufacturing: Theory”, Particulate

Science Technology 8 (3 and 4): p. 209–224 (1990)

Fuchs, N. A., The Mechanics of Aerosols, Pergamon

Press, Oxford (1964)

Liu, B. Y. H., and Ahn, K. H., “Particle Deposition on

Semiconductor Wafers”, Aerosol Science Technology 6:

p. 215–224 (1987)

National Technology Roadmap for Semiconductors,

Semiconductor Industry Association, 4300 Stevens

Creek Boulevard, Suite 271, San Jose, CA 95129, 1994

Oh, M. D., Yoo, K. H., and Myong, H. K., “Numerical

Analysis of Particle Deposition onto Horizontal

Freestanding Wafer Surfaces Heated or Cooled”,

Aerosol Science Technology 25: p. 141–156 (1996)

Peters, M. H., and Cooper, D. W., “Approximate

Analytical Solutions for Particle Deposition in Viscous

Stagnation-Point Flow in the Inertial-Diffusion Regime

with External Forces”, J. Colloid Interface Science

142(1): p. 140–148 (1991)

Sparrow, E. M. and Geiger, G. T., “Local and Average

Heat Transfer Characteristics for a Disk Situated

Perpendicular to a Uniform Plow”, J. Heat Transfer

127: p. 321–326 (1985)

Federal Standard 209E — “Airborne Particulate

Cleanliness Classes in Cleanrooms and Clean Zones”

R1-2.6 Experimental Reference

R1-2.6.1 Deposition of 0.1 to 1.0 Micron Particles,

Including Electrostatic Effects, onto Silicon Monitor

Wafers (Experimental)

R1-2.6.2 William J. Fosnight, Vaughn P. Gross,

Kenneth D. Murray, Richard D. Wang, IBM

Corporation published in 1993 Microcontamination

Conference proceedings

R1-2.6.3 Summary: Submicron particle contamination

continues to be a concern in the manufacture of

integrated circuits. Quantifying particle deposition

velocity (the ratio of particle deposition rate to airborne

particle concentration) is of fundamental importance in

understanding the defect-density impact of airborne

contamination.

R1.2.6.4 As particle size decreases, the effect of

electrostatic charge plays an increasing role in the

deposition of particles onto surfaces. This four-trial

study examines the deposition of 0.1 to 1.0 micron

particles onto horizontal, grounded and electrostatically

charged, silicon monitor wafers in an 80 feet per minute

vertical unidirectional airflow. The experimental

deposition velocity results were compared to theoretical

predictions found in the literature.

R1-2.6.5 Three primary observations were obtained

from this study. First, measured values of deposition

velocity agreed reasonably well with predicted values.

However, deposition velocity was not observed to

increase below 0.2 micron. Secondly, particles less than

0.5 micron were observed to deposit onto charged

wafers approximately three to ten times faster than onto

grounded (not charged) wafers. Finally, settling monitor

wafers may be a time consuming (and expensive)

means of certifying the cleanliness of a “clean” (less

than 10 ppcf at scanner threshold particle size)

environment. However, settling-monitor studies should

not be confused with particles-per-wafer-pass (PWP)

measurements; PWP measurements often provide

useful information regarding the performance of the

automation and/or process of a tool, even if it is in a

very clean environment.

R1-3 ESD Impacts in Semiconductor

Equipment

Contributed by Julian A. Montoya, Intel Corporation,

5200 NE Elam Young Parkway, Hillsboro OR, 97124-

6497.

R1-3.1 Introduction — Electrostatic phenomena impact

semiconductor manufacturing in many ways. These

range from increased particle accumulation on wafer

surfaces to electrostatic discharge (ESD) events which

impact equipment performance, and in some cases

impact factory yields and throughput.

R1-3.1.1 All areas within a semiconductor

manufacturing environment must be concerned with

electrostatic control. This encompasses initial wafer

receiving to shipping of final product. In addition, the

equipment which will be housed within that

environment must also be concerned with electrostatic

control and electrostatic immunity.

R1-3.1.2 This section highlights issues associated with

static charge and ESD in a semiconductor

manufacturing environment and its effects on

production equipment.

R1-3.2 Overview — Static charge issues in

semiconductor manufacturing manifest themselves in

many ways. Problems occur by direct contact with

charged items, by induction from electrostatic fields,

and indirectly by radiated and conducted

electromagnetic interference (EMI) emitted into the

environment as a result of the ESD event.

R1-3.3 Equipment ESD Examples — The following

section presents real world examples of the cause and

impacts associated with electrostatic discharge and

semiconductor manufacturing equipment.

R1-3.3.1 Charged operators came into direct contact

with diffusion furnace control panel. Process aborted on

many occasions resulting in loss of product and reduced

equipment utilization.

R1-3.3.2 Numerous instances where charged reticles

(photomasks) came into direct contact with a grounded

object. This caused damage to reticles and impacted

factory throughput. Costs were associated with

replacing damaged reticles and requalifying reticle sets.

R1-3.3.3 Charged operators came into direct contact

with electronic card cage of chemical vapor deposition

tool. This resulted in process abort, loss of product, and

reduced equipment availability.

R1-3.3.4 Charged wafer cassette induced charge onto

robot arm on wafer transfer tool. Robot arm came into

contact with grounded screw creating an ESD event.

This resulted in data corruption which caused robot