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SEMI T14.1-0705 © SEMI 2005 7 Back Grin ded area Polishe d Area by C h em i c al M e c h an i c a l P olis hing (C MP) Rem a ining are a for Mi cr o ID R e f e r e n c e P o i n t Back Grinded area Polishe d Area by Chem…

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SEMI T14.1-0705 © SEMI 2005 6
RELATED INFORMATION 1
APPLICATION NOTES
NOTICE: This related information is not an official part of SEMI T14.1 and was derived from full letter ballot
procedures on May 20, 2005.
R1-1 Shape and Size of the Protrusion Dot Mark
R1-1.1 A microdot mark is formed by laser irradiation and consists of a single dot mark on each laser-irradiated
point. The mark has a single protrusion, which includes a concave portion provided around the protrusion and lower
than a surface of the wafer and whose center portion protrudes upward so as to be higher than the surface of the
wafer. The nominal shape of the dot produced in the matrix may be circular or square. Its diameter or edge length
shall be 4.0 µm + 10% – 20%. The protrusion height is more than 200 nanometers, formed on each laser irradiate
point, as shown in below Figure.
+10%
- 20%
A
4.0 m
H
+10%
- 20%
A
A
>
=
4.0 m
H
+10%
- 20%
A
4.0 m
H
+10%
- 20%
A
H 200nm
4.0
μ
m
H
+10%
- 20%
A
4.0 m
H
+10%
- 20%
A
>
=
4.0 m
H
+10%
- 20%
A
4.0 m
H
+10%
- 20%
A
H 200nm
4.0 m
H
+10%
- 20%
A
4.0 m
H
+10%
- 20%
A
A
>
=
4.0 m
H
+10%
- 20%
A
4.0 m
H
+10%
- 20%
A
H 200nm
4.0
μ
m
H
+10%
- 20%
A
4.0 m
H
+10%
- 20%
A
>
=
4.0 m
H
+10%
- 20%
A
4.0 m
H
+10%
- 20%
A
H 200nm
4.0 m
H
NOTE: Figure R1-1 is not to scale.
Example of circular dot
Figure R1-1
Dot Height & Vertical Cross Section
R1-2 Location of Data Matrix Code Symbol
R1-1.2 Data matrix code location is defined on the front bevel of a 300 mm diameter notched wafer, whose side
view is referred from SEMI M1.
SEMI T14.1-0705 © SEMI 2005 7
Back Grinded area
Polished Area by
Chemical Mechanical Polishing (CMP)
Remaining area for Micro ID
R
e
f
e
r
e
n
c
e
P
oi
n
t
Back Grinded area
Polished Area by
Chemical Mechanical Polishing (CMP)
Remaining area for Micro ID
R
e
f
e
r
e
n
c
e
P
oi
n
t
R
e
f
e
r
e
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c
e
P
oi
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t
NOTE: Figure R1-2 is not to scale.
Figure R1-2 (Side view)
Data Matrix Code Location on Front Bevel Surface of 300 mm Diameter Wafer
SEMI T14.1-0705 © SEMI 2005 8
RELATED INFORMATION 2
APPLICATION NOTES
NOTICE: This related information is not an official part of SEMI T14.1 and was derived from full letter ballot
procedures on May 20, 2005.
R1-2 References
R1-2.1 The following papers may be referred to understand Micro ID technology presented in this document.
Improvement in Reading Precision of Micro-ID Engraved on Wafer, ISSM2003, 2003/09/30
Micro-ID Technology for Single Wafer Management, ISSM2002, 2002/10/17
New Identification System for Individual Wafer Management, ISSM2000; Session II-6 (2000) Page33,
2000/9/26
R1-3 R2-2 SEMI Activities
R1-3.1 Additional information is gathered at the second round robin of the Micro ID Task Force.
R1-3.2 Many of such information turned out to be excellent and valuable in reading the Micro ID.
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