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SEMI M8-0703 © SEMI 1984, 2003 11 Item Process Te st Wafers 0.18 µm or 0.13 µm Design Rule 6.7 Thickness Target Tolerance SEMI M1 ± 25 µ m 6.8 Thickness Variation (TTV) Unspecified 6.9 Wafer Surface Orientation {100} ± 1…

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SEMI M8-0703 © SEMI 1984, 2003 10
Table 5 Guide for Specifying 200 mm & 300 mm Polished Silicon Process Test Wafers for Advanced
Applications
Item Process Test Wafers
0.18 µm or 0.13 µm Design Rule
1.0
GENERAL CHARACTERISTICS
1.1 Growth Method CZ or MCZ
1.2 Crystal Orientation <100>
1.3 Conductivity Type P
1.4 Dopant Boron
1.5 Nominal Edge Exclusion 3 mm
2.0
ELECTRICAL CHARACTERISTICS
2.1 Resistivity
0.5– 50.0 ·cm
2.2 Radial Resistivity Variation Unspecified
2.3 Resistivity Striations Unspecified
2.4 Minority Carrier Recombination Lifetime Unspecified
3.0
CHEMICAL CHARACTERISTICS
3.1.1 Oxygen Concentration Unspecified
3.2 Radial Oxygen Variation Unspecified
3.3 Carbon Concentration Unspecified
4.0
STRUCTURAL CHARACTERISTICS
4.1 Dislocation Etch Pit Density Unspecified
4.2 Slip None
4.3 Lineage None
4.4 Twins None
4.5 Swirl Unspecified
4.6 Shallow pits Unspecified
4.7 Oxidation-Induced Stacking Faults (OSF) Unspecified
4.8 Oxide Precipitates Unspecified
5.0
WAFER PREPARATION
CHARACTERISTICS
5.1 Wafer ID Marking
200 mm
300 mm
User Specified
SEMI M1.15
5.2 Front Surface Thin Films None
5.3 Denuded Zone None
5.4 Extrinsic Gettering None
5.5 Backseal None
6.0
MECHANICAL CHARACTERISTICS
6.1 Diameter SEMI M1
6.2 Primary Fiducial Location SEMI M1
6.3 Primary Fiducial Dimension SEMI M1
6.6 Edge Profile SEMI M1
SEMI M8-0703 © SEMI 1984, 2003 11
Item Process Test Wafers
0.18 µm or 0.13 µm Design Rule
6.7 Thickness
Target
Tolerance
SEMI M1
± 25 µm
6.8 Thickness Variation (TTV) Unspecified
6.9 Wafer Surface Orientation {100} ± 1 deg
6.11 Warp SEMI M1
6.12 Sori Unspecified
6.14 Flatness/Site Unspecified
7.0
FRONT SURFACE CHEMISTRY
7.1 Surface Metal Concentration: See Note 1.
8.0
FRONT SURFACE CRITERIA
8.1 A Scratches (macro) – total length None
8.1 B Scratches (micro) – total length
0.10 × Diameter
8.2 Pits None
8.3 Haze None by Bright Light Inspection
8.4 Localized Light Scatterers See Note 2.
8.5 Contamination/Area None
8.6 Edge Chips None
8.7 Edge Cracks None
8.8 Crack, crows feet None
8.9 Craters None
8.10 Dimples None
8.11 Grooves None
8.12 Mounds None
8.13 Orange Peel None
8.14 Saw Marks None
9.0
BACK SURFACE CRITERIA
9.1 Edge Chips None
9.6 Roughness Unspecified
9.7 Brightness (Gloss) 200 mm
300 mm
Unspecified
SEMI M1.15
9.8 Scratches (macro) – total length
0.5 × diameter
9.9 Scratches (micro) – total length Unspecified
9.10 Localized Light Scatters Unspecified
10.0
OTHER CHARACTERISTICS
TBD
(See Note 3).
Edge Condition Bright Etched or Polished
NOTE 1: Test wafers are cleaned according to a defined prime wafer supplier process, with a stated capability for removable LLS. Test wafer
characteristics are defined to be the “unsorted” process capability for these parameters and accordingly, will not be sorted. Products needing
special LLS requirements should be described by SEMI M24 criteria.
NOTE 2: Test wafers are cleaned according to a defined prime wafer supplier process, with a stated capability for surface metals. Test wafer
characteristics are defined to be the “unsorted” process capability for these parameters and accordingly, will not be sorted. Products needed
special surface metal requirements should be described by SEMI M24 criteria.
NOTE 3: The A revision to SEMI M18 to provide this designation item number is in process being developed. When the this revision to SEMI
M18 is completed, this document specification will be revised to include the assigned item number from SEMI M18 designation.
SEMI M8-0703 © SEMI 1984, 2003 12
NOTICE: SEMI makes no warranties or representations as to the suitability of the standard set forth herein for any
particular application. The determination of the suitability of the standard is solely the responsibility of the user.
Users are cautioned to refer to manufacturer’s instructions, product labels, product data sheets, and other relevant
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