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SEMI MF951-0305 © SEMI 2003, 2005 3 8 Test Plans 8.1 Test Plan A 8.1.1 This test plan consists of measurem en ts (1 ) at the center of the wafer, located within 3 mm of th e intersection of any two diameters that are at …

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SEMI MF951-0305 © SEMI 2003, 2005 2
4 Referenced Standards
4.1 SEMI Standards
SEMI MF81 — Method for Measuring Radial Resistivity Variation on Silicon Wafers
SEMI MF533 — Test Method for Thickness and Thickness Variation of Silicon Wafers
SEMI MF1188 — Test Method for Interstitial Atomic Oxygen Content of Silicon by Infrared Absorption
SEMI MF1366 — Test Method for Measuring Oxygen Concentration in Heavily Doped Silicon Substrates by
Secondary Ion Mass Spectrometry
SEMI MF1619 — Test Method for Measurement of Interstitial Oxygen Content of Silicon Wafers by Infrared
Absorption Spectroscopy with p-Polarized Radiation Incident at the Brewster Angle
4.2 JEITA (formerly JEIDA) Standard
1
EM-3504 (61) — Standard Test Method for Interstitial Atomic Oxygen Content of Silicon by Infrared Absorption
4.3 DIN Standards
2
50435 — Determination of the Radial Resistivity Variation of Silicon or Germanium Slices by Means of a Four-
Point-DC-Probe
50438/1 — Determination of Impurity Content in Silicon by Infrared Absorption: Oxygen
50441/1 — Determination of the Geometric Dimensions of Semiconductor Slices: Measurement of Thickness
4.4 ANSI Standard
3
ANSI/ASQC Z1.4–1993 Sampling Procedures and Tables for Inspection by Attributes
NOTICE: Unless otherwise indicated, all documents cited shall be the latest published versions.
5 Summary of Test Method
5.1 Instruments are selected and qualified according to the test procedure chosen.
5.2 Measurements are made at the specified test locations and a relative oxygen variation is calculated by one of
four available plans.
6 Apparatus
6.1 Infrared Spectrophotometer, as required by the test method for interstitial oxygen measurement.
6.2 Thickness Measurement Equipment, as required by the test method.
6.3 Fixturing, capable of positioning test slices to the tolerances required in each plan, including a fixed
7.0 ± 0.5 mm circular aperture centered on the infrared beam.
7 Sampling
7.1 Sampling plans must be agreed upon by the participants.
7.2 For acceptance testing, ANSI/ASQC Z1.4-1993, normal level, must be used unless other agreements have been
made.
1 Japan Electronics and Information Technology Industries Association, 3
rd
floor, Mitsui Sumitomo Kaijo Bldg. Annex, 11, Kanda-Surugadai 3-
chome, Chiyoda-ku, Tokyo 101-0062, Japan, Telephone: 81.3.3518.6434, Fax: 81.3.3295.8726, Website:
www.jeita.or.jp.
2 Deutches Institut für Normung e.V., standards are available in both English and German editions from Beuth Verlag GmbH, Burggrafenstrasse
6, 10787 Berlin, Germany, Telephone: 49.30.2601-0, Fax: 49.30.2601.1263, Website:
www.beuth.de
.
3 American National Standards Institute, New York Office: 25 West 43rd Street, New York, NY 10036, USA. Telephone: 212.642.4900, Fax:
212.398.0023, Website:
www.ansi.org
.
SEMI MF951-0305 © SEMI 2003, 2005 3
8 Test Plans
8.1 Test Plan A
8.1.1 This test plan consists of measurements (1) at the center of the wafer, located within 3 mm of the intersection
of any two diameters that are at least 45 apart, and (2) at one position 10.0 ± 1 mm from the sample periphery on
one of the diameters parallel with or perpendicular to the major flat (or, for notched wafers, perpendicular to or
parallel with the notch axis).
8.1.2 The positions of edge measurement sites are determined by the distance from the sample periphery to the
center of the aperture.
8.1.3 The position A1 on the diameter perpendicular to the major flat (parallel with the notch axis) and at the side of
the wafer opposite the major flat (or notch) is preferred (see Figure 1). Positions A2 and A3 on the diameter parallel
with the major flat (perpendicular to the notch axis) may be selected to replace position A1 if agreed to by both
customer and supplier. Specify Test Plan A1, Test Plan A2, or Test Plan A3 depending on the position selected.
8.1.4 When an interfering minor flat is present, locate the edge position as though the minor flat were not present.
Figure 1
Test Plan A
8.2 Test Plan B
8.2.1 This test plan consists of measurements at the center of the wafer, located within 3 mm of the intersection of
any two diameters that are at least 45 apart, and at two positions 10.0 ± 1 mm from the sample periphery on each
end of the diameter parallel with the major flat (or, for notched wafers, perpendicular to the notch axis) (see Figure
2).
8.2.2 In addition, two optional measurements may be made at the half radius [(R/2) ± 1 mm] positions on the same
diameter of the wafer. If made, these optional measurements must be in addition to measurements at the center and
two edge positions. Customer and supplier must agree on the use of measurements at R/2 positions. Specify Test
Plan B1 when using all five positions.
8.2.3 When an interfering minor flat is present, locate the edge position as though the minor flat were not present.
SEMI MF951-0305 © SEMI 2003, 2005 4
Figure 2
Test Plan B
8.3 Test Plan C
8.3.1 This test plan consists of measurements at each of the five measurement positions defined in Plan B of both
SEMI MF81 and DIN 50435 and in both SEMI MF533 and DIN 50441/1.
8.3.2 Edge position tolerances are ±1 mm; center position shall be within 3 mm of the intersection of any two
diameters which are at least 45° apart (see Figure 3).
Figure 3
Test Plan C
8.4 Test Plan D
8.4.1 This test plan consists of measurements at a series of points between the edge and center of the wafer along
the diameter parallel with the major flat (or perpendicular to the notch axis) (see Figure 4).
8.4.2 The first position, nearest sample periphery, shall be located in the same manner as Position A2 of Plan A (see
Figure 1).