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SEMI M46-1101 E © SEMI 2001 5 12.4 Contact Evaluati on — Verify that the contacts, for both directi o ns of curren t flow have low and approxim ately equal resistan ce. 12.5 Rest Potentia l — Measure th e sam ple’s rest …

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eyewear, rubber gloves and protective clothing. Prepare
all electrolytes in a fume hood.
9.2 Ensure that all electrolytes are correctly labeled.
10 Specimen Preparation
10.1 The sample should be free from surface debris
and scratches. The sample should be cleaned with
deionized (DI) water and dried.
10.2 To measure a single layer or upper layer of a
multilayered structure, no additional sample preparation
is required.
10.3 For a buried layer in a multilayered structure,
measurement accuracy is improved by removing the
overlaying layers by either the use of selective or
controlled chemical etches.
10.4 If the upper layers cannot be removed by
chemical etching then the sample can be profiled
electrochemically but in some cases this may reduce the
accuracy of the method.
10.5 For conducting substrates Ohmic contacts should
be made to either the front or back of the wafer. For
insulating substrates an Ohmic contact should be made
to the front of the epilayer. Contacts are formed
electrically, by alloying or by any other suitable
method. The quality of the contact should be verified
electrically.
11 Calibration and Standardization
11.1 Sealing Ring — Calibration of the sealing ring
areas is performed using a “blue slice”, made by
growing an anodic oxide film on a polished n-type
substrate.
11.1.1 The “blue slice” is profiled according to this test
method. Etch only the minimum amount necessary to
see the illuminated area (typically 0.5 µm). Flush the
cell several times with DI water before removing the
sample. Wash and measure the sample as soon as
possible.
11.1.2 Wetted Area — The wetted area is observed due
to chemical attack of the oxide film and is measured
using a measuring microscope with cross hair eye-
pieces and micrometer XY stage or by using a zoom
camera and image processing system.
11.1.3 Illuminated Area — Etches in the light and
forms a well defined etch well, which is measured as
per the wetted area.
11.1.4 Calibration Interval — Regularly check the area
and condition of the sealing ring. For daily use, the ring
areas should be calibrated at least three times a week.
11.1.5 Replacement — Rings should be replaced if the
excess area exceeds 10% for rings of area ≤ 0.05 cm
2
or
5% for rings of area > 0.05 cm
2
or if the perimeter is
not uniform.
11.1.6 Alternative Calibration Method — The areas
can be measured using known n and p-type test
samples. This method is best suited for continual
monitoring of the ring area between “blue slice”
calibrations.
11.2 Instrumentation — The bias voltage,
measurement frequency and capacitance measurement
should be checked annually.
11.2.1 Bias — The bias voltage should be checked
with a DVM with an input impedance > 1 MOhm.
11.2.2 Capacitance — The capacitance measurement
should be checked using calibrated fixed value
capacitors covering the expected sample capacitance
range or from 1–100 nF.
11.2.3 Frequency — The measurement frequency
should be checked with a frequency counter.
12 Measurement Procedure
12.1 Choice of Electrolyte — An electrolyte should be
selected that forms a rectifying barrier with the sample,
gives a flat, mirror finish etch well and generates only a
small excess area.
12.2 Sample Mounting — A region of the sample
should be defined which will form the rectifying
contact with the electrolyte. This area can be defined by
some form of sealing ring or mask, but it is important
that the area of contact between the electrolyte and the
sample be precisely known and remain constant during
the measurement.
12.2.1 Sealing Ring — If the sample is pressed against
a sealing ring, the seal must be cleaned with DI water
and dried before positioning the sample. If the sample
needs repositioning, the sample and sealing ring should
be recleaned and dried.
12.2.2 Ring Loading — As the mounting pressure may
effect the reproducibility of the measurement and the
lifetime of the sealing ring, it must be controlled (e.g.
by the reproducible use of a suitable compression
spring).
12.3 Cell Filling and Debubbling — Fill the cell,
which holds the sealing ring and other measurement
electrodes, with the electrolyte. The process of filling
the cell frequently traps bubbles of air on the surface of
the sample. These bubbles must be removed before a
measurement can be made.

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12.4 Contact Evaluation — Verify that the contacts,
for both directions of current flow have low and
approximately equal resistance.
12.5 Rest Potential — Measure the sample’s rest
potential to verify that the reference electrode and
sample are electrochemically stable. Its value usually
lies between 0 and −1 V (respective to a SCE reference
electrode). Values outside this range can indicate a
problem with the sample or reference electrode.
12.6 Cable Compensation — Determine any stray
capacitance or additional resistance associated with the
cell and test leads that would impact the measurement.
12.7 Current vs. Voltage (I-V) — Used to select the
bias for measurement and etching and as a general test
of material quality.
12.7.1 Measurement Bias — is set in the reverse bias,
low dark current region.
12.7.2 Etching Bias (p-type material) — is set in the
forward bias region. The abruptness of the forward bias
breakdown is indicative of the ohmic nature of the
contacts. No or shallow forward breakdown often
indicates unsuitable ohmic contacts.
12.7.3 Etching Bias (n-type material) — is set in the
reverse bias, low dark current region. Illumination
should result in a significant increase in current (photo-
current).
12.8 Capacitance vs. Voltage (C-V) — Used to
evaluate the quality of the electrochemical diode and to
select a range of possible measurement voltages. The
measured flatband potential (respective to a SCE
reference electrode) should lie between −0.5 and
−2.5 V for n-type semiconductors and between –1 and
+1 V for p-type semiconductors.
12.8.1 Measurement Bias — is set in a region of low
dissipation, where the 1/C
2
vs V plot is linear. For
layers grown with concentration gradients, the latter
condition cannot be strictly adhered to and in such
cases the amplitude of the test signal, used for
capacitance measurement, should be kept as small as
possible.
12.8.2 Dissipation — The normally accepted safe level
is < 0.4.
12.8.3 Excess Area Capacitance — For n-type surface
layers the capacitance of the electrolyte/semiconductor
interface is measured prior to etching and the
capacitance associated with the excess area is computed
by multiplying the measured capacitance by the ratio of
the excess area to the wetted area.
12.9 Carrier Concentration Profiling — Profile the
sample using the etching and measurement conditions
determined from the I-V and C-V data.
12.9.1 Carrier Concentration — The carrier
concentration is determined from the C-V data.
12.9.2 Excess Area Correction — For n-type material
the capacitance associated with material in the excess
area should be subtracted from the measured
capacitance.
12.9.3 Etching — The sample is anodically etched at
the etching bias. The depth of the etch well is
determined from the time integral of the current using
Faraday’s law of electrolysis.
12.9.4 Profiled Depth — The profile assumes that the
measured carrier concentration lies at a depth equal to
the sum of the etch and the depletion depths.
12.10 Ring Area — It is advised to measure the etch
well area after profiling and to use this value to
recalculate the carrier concentration vs. depth profile.
13 Calculations and Interpretation of Results
13.1 Carrier Concentration, N
The principle of this method is based on measuring the
slope of 1/C
2
vs V.
()
1
2
2
0
/1
.
2
−
ú
û
ù
ê
ë
é
−
=
dV
Cd
Aq
N
r
εε
[cm
-3
]
where
C is the measured capacitance (for n-type
material the capacitance associated with the
excess area should be subtracted from the
measured capacitance),
V is the applied bias,
q is the electronic charge,
ε
r
is the relative permittivity of the sample,
ε
o
is the permittivity of free space
(= 8.854 × 10
-12
Fm
-1
)
A is the area of the etch well
It is also possible to measure dC/dV by modulating the
bias with a low frequency (secondary signal). The
d(1/C
2
)/dV of the upper equation may be evaluated to
result in the following formula.
dV
dC
C
Aq
N
r
3
2
0
.
1
εε
=
[cm
-3
]
13.1.1 Excess Area Capacitance, excessC
w
iw
excess
A
AA
CC
−
= .
[F]

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Where
C
excess
is the capacitance of material in the
excess area,
A
w
is the wetted area,
A
i
is the illuminated area
13.2 Depletion Depth, W
d
, — calculated from the
parallel plate capacitor equation.
C
A
W
r
d
ε
ε
0
=
[µm]
13.3 Etched depth, W
e,
— calculated from the charged
passed through the cell using Faraday’s law for
electrolysis.
W
M
z
FDA
Idte =
ò
[µm]
Where
z is the effective dissolution valency,
F is the Faraday constant,
(= 9.65 × 10
4
Cmol
-1
)
D is the density of the semiconductor,
M is the molecular weight of the
semiconductor
I is the etch current
13.4 Total depth, W, — the sum of the depletion and
etch depths and is the depth at which the measurement
is made.
W
W
W
de=+ [µm]
14 Reporting Results
14.1 The following information shall be included in the
report:
14.1.1 Identification of Specimen — including details
of any pretreatment such as the use of a selective etch
to chemically etch the sample to the layer of interest.
14.1.2 Sealing Ring Area — both the wetted and
illuminated areas should be reported.
14.1.3 Electrolyte — the composition of the electrolyte
should specify the molecular concentration.
14.1.4 Material Constants — The relative permittivity
of the sample,
ε
r
and the effective dissolution valency,
z.
14.1.5 Primary Measurement Signal — the frequency
and amplitude of the signal used for the capacitance
measurement.
14.1.6 Secondary (bias) Signal — If the measurement
is made using a secondary modulation component its
frequency and amplitude should be reported. If the
measurement is made by changing the bias, its
minimum and maximum value should be specified.
14.1.7 Measurement Bias — The average value (DC
component) of the bias used during the capacitance
measurement.
14.1.8 Electrochemical Etching Bias — The bias used
to etch the sample including whether or not the sample
was illuminated. If etched at a constant current this
should be stated. Then it is not necessary to report the
bias.
14.1.9 Electrochemical Etching Current — If etched at
constant bias the average value of current measured
during electrochemical etching. If etched at a constant
current the value used.
NOTICE:. SEMI makes no warranties or
representations as to the suitability of the standards set
forth herein for any particular application. The
determination of the suitability of the standard is solely
the responsibility of the user. Users are cautioned to
refer to manufacturer’s instructions, product labels,
product data sheets, and other relevant literature
respecting any materials mentioned herein. These
standards are subject to change without notice.
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compliance with this standard may require use of
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takes no position respecting the validity of any patent
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