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SEMI IN TERNA TIONA L STANDA RDS PA CKA GIN G Sem iconduct or Equipm ent and Materials Inte rnational

SEMI P43-0304 © SEMI 2004 15
allowing compensation of area gain and area loss. In case of,
e.g., corner area devation uniformity, line-edge roughness
will influence the measurement result.
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herein. These standards are subject to change without
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SEMI INTERNATIONAL STANDARDS
PACKAGING
Semiconductor Equipment and Materials International

SEMI G1-96 © SEMI 1980, 19961
SEMI G1-96
SPECIFICATION FOR CERDIP PACKAGE CONSTRUCTIONS
NOTE: This entire document was revised in 1996.
1 Purpose
This specification defines the materials and acceptance
criteria for the components (bases, window frames, and
caps) or sub-assemblies (leadframes mounted in a
sandwich between bases and window frames) used for
cerdip package constructions.
NOTE 1: Materials and acceptance criteria for leadframes,
purchased separately for these constructions, are described in
SEMI G2.
2 Scope
This specification applies to all cerdip (dual-in-line)
packages which have either:
• A leadframe sandwiched between two ceramic
pieces — the base and a window frame — and
sealed by a solder glass layer, and a cap with a
similar seal; or,
• A leadframe mounted into a solder glass layer on a
ceramic base, and a cap with a similar glass seal
layer.
NOTE 2: The base, leadframe, and, if required, the window
frame may be purchased as separate components or as a sub-
assembly.
3 Units
This specification uses U.S. Customary (inch pound)
units as the prime unit.
4 Referenced Documents
4.1 Order of Precedence
To avoid conflicts, the order of precedence when
ordering components or sub-assemblies for cerdip
packages shall be as follows:
• Purchase order
• User’s package drawings
• This specification
• Reference documents
• Related documents
4.2 Referenced Documents
4.3 SEMI Specifications
SEMI G2 — Specification Metallic Leadframes for
Cer-Dip Packages
SEMI G20 — Specification Lead Finishes for Plastic
Packages (Active Devices only)
SEMI G23 — Test Method Measuring the Inductance
of Package Leads
SEMI G24 — Test Method Measuring the Lead-to-
Lead and Loading Capacitance of Package Leads
SEMI G25 — Test Method Measuring the Resistance
of Package Leads
SEMI G30 — Test Method Junction-to-Case Thermal
Resistance Measurements of Ceramic Packages
4.4 ANSI Specification
1
ANSI Y14.5M — Dimensioning and Tolerancing
4.5 JEDEC Publication
2
JEDEC Publication 95 — Registered and Standard
Outlines for Semiconductor Devices
4.6 Military and Federal Specifications
3
MIL-STD-105D — Sampling Procedures and Tables
for Inspection by Attributes
MIL-STD-883 — Test Methods and Procedures for
Microelectronics
MIL-STD-1835 — Microcircuit Case Outlines
MIL-I-38535 — General Specifications for
Microcircuits
5 Terminology
5.1 blister (bubble) metallization — An enclosed,
localized separation of the metallization from its base
material (such as ceramic or other metallization layer
component) that does not expose the underlying layer.
5.2 burr — An adherent fragment of parent material at
a component edge. In leadframes, the metal burr, due to
the stamping operation, may be in the horizontal or
vertical direction to the surface. In ceramic packages,
this type of characteristic is called a fin.
1 American National Standards Institute, 1430 Broadway, New York,
NY 10018
2 Joint Electronic Development Engineering Council, 2001 Eye
Street, N.W., Washington, D.C. 20006
3 Military Standards, Naval Publications and Form Center, 5801
Tabor Avenue, Philadelphia, PA 19120