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SEMI E78-1102 © SEMI 1998, 2002 15 high current parasitic bipolar action deep in the substrate and also within th e ESD protective structures. The electrical characteristics f ound also resistive shorts, leakages, low br…

SEMI E78-1102 © SEMI 1998, 2002 14

to those established by the ESD Association Standards

ESD STM 5.1 (for HBM), ESD S5.2 (for MM), and

MIL-STD-883, C/3015.7-method 8. The ESD

Association is presently considering two documents

related to CDM Testing. Details are to be found in these

standards.

R1-1.4.1.1 Devices are qualified at a level

corresponding to the highest ESD stress they are able to

withstand. These levels are discussed in more detail in

Appendix A1-2.1.

R1-1.4.2 Simulation Test Results — In general all units

must be data-logged both pre- and post-stress test. Any

leakage current equal to or greater than a specific

amount (company dependent — typically 10 micro-

amps or less) is “flagged” as a failure, and any current

shift greater than about 200 nano-Amp is marked on the

record.

R1-1.4.3 HBM Stress Testing — An R-C network is

used to simulate the ESD event. In an HBM ESD

Simulator, a high voltage is used to charge the capacitor

(100 pF) which discharges through the resistor (1500

ohms) into the device under test. The present draft

standard (1997) requires a minimum of two discharges

(1 positive and 1 negative) per voltage level.

R1-1.4.4 MM Stress Testing — An R-C network is also

used in the MM ESD Simulator for ESD testing. High

voltage charges the capacitor (200 pF) which

discharges through the short wire (zero ohm) into the

device under test. The present standard requires a

minimum of six discharges (3 positive and 3 negative).

R1-1.4.5 CDM Stress Testing — The package and

leadframe of the device are charged by direct charging

or field induction. For the Direct Charging Method,

direct contact is made to one of the device leads

connected to the substrate or bulk material of the

device. The device is then discharged via a one ohm

resistor to ground.

R1-1.4.5.1 For the Field Induced Method, the device is

placed on a metallic charging plate with the device

packaging material touching the plate. The potential of

the device is raised by applying a voltage to the

charging plate. The induced voltage on the device is

discharged to ground through a 1 ohm resistor that

contacts each device lead. The present draft standard

(1996) requires a minimum of 6 discharges (3 positive

and 3 negative) from each device lead.

R1-1.5 Examples of Damage from Device Testing

R1-1.5.1 HBM ESD Damage

Figure R1-1

Example of HBM Damage

R1-1.5.1.1 In this example of HBM damage (refer to

Figure R1-1), de-processing (removal of the processed

layers) down to the poly level and very high

magnification (SEM) examination were required in

order to see the failure site morphology of arcing from

source to drain within the ESD protective structures.

The electrical characteristics found were: resistive

shorts, leakages, low breakdown voltages and Icc

failures.

R1-1.5.2 MM ESD Damage

Figure R1-2

Example of MM Damage

R1-1.5.2.1 In the above MM example (refer to Figure

R1-2), the damage was more severe than for HBM. De-

processing down to the poly level and the SEM

examination showed the failure site morphology of

large deep pits occurring at the contact(s) suggesting

SEMI E78-1102 © SEMI 1998, 2002 15

high current parasitic bipolar action deep in the

substrate and also within the ESD protective structures.

The electrical characteristics found also resistive shorts,

leakages, low breakdown voltages and Icc failures.

R1-1.5.3 CDM ESD Damage

Figure R1-3

Example of CDM Damage

R1-1.5.3.1 In the above CDM example (refer to Figure

R1-3), the gate oxide damage is seen as a unique failure

signature beyond the input protection structures at an

internal location of the die. Most often the oxide failure

is located beneath the poly at the field oxide edge, or is

located at the poly edge adjacent to the source/drain

junction. To date all CDM ESD damage has been found

in the gate oxide at the input buffer circuitry.

R1-1.6 References

Cook, C., Daniel, S., Proceedings EOS/ESD

Symposium, Dallas, TX (1992), p. 149–157

Euzent, B.L., Maloney, T.J., Donner II, J.C.,

Proceedings EOS/ESD Symposium, Las Vegas, NV

(1991), p. 59–64

Morgan, I.H., A Handbook of EOS and ESD Models,

AMD Internal Publication (1992)

Pierce D.G., Shiley, W., Mulcahy, B., Wunder, M.,

Proceedings EOS/ESD Symposium, Anaheim, CA

(1988), p. 137–146

May, J.T., Guravage, J.F., Proceedings ISTFA, Los

Angeles, CA (1990), p. 143–147

Avery, L.R., EOS/ESD Symposium, Orlando, Florida

(1987), p. 186–191

Avery, L.R., Proceedings EOS/ESD Symposium, FL

(1987), p. 88–92

Renninger, R.G., Jon, M.C., Lin, D.L., Diep, T.,

Welsher, T.L., Proceedings EOS/ESD Symposium,

New Orleans, LA (1989), p. 59–71

Bossard, P.R., Chemelli, R.G., Unger, B.A.,

Proceedings EOS/ESD Symposium, San Diego, CA

(1980), p. 17–22

AMD Internal Publications, PLD/CQD EOS/ESD,

EOS/ESD Task Force Reports, July 1993 and January

1994

Raymond, T., Chang, K.L., Henry, Leo G., AMD 3

Engineering Conference, February 1994

ESD STM5.1 — Sensitivity Testing – Human Body

Model (HBM) - Component Level

ANSI/ESD STM5.2 — Sensitivity Testing -- Machine

Model (MM) - Component Level

MIL-STD-883, Method 3015.7, March,1989

Gieser, H.A., Egger, P., Herrmann, M.R., Reiner, J.C.,

Birolini, A., ESREF Proceedings, Bordeaux, France

(1993)

Henry, Leo G., Raymond, T., Mahanpour, M., Morgan,

I., 20th International Symposium for Testing and

Failure Analysis (ISTFA), 1994

R1-2 Enhanced Particle Deposition

Attributable to Electrical Charge on a Wafer

Contributed by Douglas W. Cooper, Ph.D., The

Texwipe Company, Upper Saddle River, NJ 07458.

R1-2.1 Introduction — The presence of excess

electrical charge on a wafer can create an electrostatic

field that will lead to accelerated deposition of particles

onto the wafer. This undesirable consequence is but one

of several threats to product yield posed by the presence

of excess electrical charge on a wafer. Sections R1-1

and R1-3 of this related information discuss two other

important and potentially damaging consequences of

surface charge.

R1-2.1.1 The purpose of the discussion in this section

is to estimate the magnitude of electrostatic field that

can be tolerated before electrostatically enhanced

particle deposition becomes the dominant particle

deposition mechanism. Over the particle size range 0.01

to 0.3 µm, diffusion is the dominant, non-electrostatic

mechanism of particle deposition. Thus, values of

electrostatic fields that do not produce particle

deposition velocities greater than those attributable to

particle diffusion will be deemed tolerable. A set of

such values calculated under a specific and very

restrictive set of conditions are presented in this section.

R1-2.2 Theoretical Background — Although there are

numerous electrostatic interactions between particles

and surfaces, the dominant one is almost always the

“Coulombic” interaction: the attraction (or repulsion) of

SEMI E78-1102 © SEMI 1998, 2002 16

a charged particle by a charged surface. This is the only

electrostatic effect considered here.

For particles of one diameter, d, and one charge, q, the

particle deposition flux, j, (the number of particles

deposited per unit area per unit time) is the product of

aerosol particle number concentration, c; particle

charge, q; the electric field created by the charged

wafer, E; and particle mechanical mobility, B (terminal

velocity per unit external force):

j = cqEB (1

)

The group qEB is the “electrostatic deposition

velocity”, v

elect

= qEB =

c (2)

The variables q and E are those containing the electrical

parameters that affect the magnitude of v

elect

; B depends

on particle diameter but not electrical properties.

It is the v

elect

values that will be calculated for

comparison with those of v

diff

, the particle deposition

velocity attributable to particle diffusion. Values of E

for which v

elect

< v

diff

will be those deemed tolerable in

wafer manufacturing.

Note that the total number of particles, N, deposited on

a wafer, obtained by integrating Equation (1) over the

wafer area, A, and the time of exposure, t, depends on c

as well as the deposition velocity:

= cqEBAt o

= ctv

elect

(3)

Reducing c obviously reduces N, but the relative

importance of the differing deposition mechanisms and

the values of the deposition velocities associated with

these mechanisms are assumed to not depend upon c, at

least to a first-order approximation (see, for example,

Peters and Cooper, 1991).

R1-2.2.1 Effect of the Particle Charge, q — There are

many charging and discharging mechanisms for

particles, so q is hard to predict and likely to be highly

variable. In a normal atmosphere the positive and

negative air ions tend to have roughly equal

effectiveness in charging particles, so that the number

of positively charged particles is roughly equal to the

number of negatively charged particles. Thus, about

half the particles will be attracted and half repelled by a

net charge on the wafer. Special circumstances, such as

corona discharge ionizers that are not balanced, could

alter this conclusion. Without ionizers, cleanrooms tend

to have relatively low levels of ions compared to the

outdoor or other indoor atmospheres, because the

HEPA/ULPA filters efficiently remove ions from the

recirculating air.

R1-2.2.1.1 A Boltzmann charge equilibrium, the

charge distribution approximated by aerosol particles

exiting a radioactive neutralizer, is a plausible lower

limit for particle charge and will be assumed in the

calculations of v

elect

, using an improved version of this

distribution developed by Fuchs (1964). Upper limits

on particle charge are determined by ion emission limits

or, in the case of water droplets, the Rayleigh limit.

However, assuming higher particle charge distributions

usually means that v

elect

> v

diff

for virtually any value of

E > 0 and that the only method for avoiding

electrostatically enhanced particle deposition is to

reduce wafer charge to zero. Thus, the Fuchs charge

distribution will be assumed in calculating v

elect

even

though it represents the most favorable particle charge

distribution for minimizing electrostatically enhanced

particle deposition. Under many practical circumstances

the particle charge will be greater and the maximum

tolerable electrostatic field will be lower than that

calculated for the Fuchs charge levels.

R1-2.2.2 The Electrostatic Field, E, Induced by the

Wafer Surface Charge — The electrostatic field will

depend on the charge on the wafer divided by a quantity

with the units of length squared; either a distance

squared (far from the wafer) or an area (close to the

wafer) or some combination at intermediate distances.

While field is not properly measured as a voltage,

measuring the voltage, V, at a fixed distance, s, from the

wafer allows inferring the field from V/s and the

appropriate geometric and dimensional factors. The

electrostatic field to be used in Equation (2) can be

estimated from the ratio of the wafer charge to the

wafer surface area, or the average field near the surface

at the center, E

R1-2.2.2.1 Very far from the wafer, many wafer

diameters away, the field created by the net wafer

charge, Q, will be similar to that from a point charge:

= k

(4)

where k

depends on the system of units used; and r is

the distance from the center of the wafer to the particle.

R1-2.2.2.2 Very close to the wafer, a fraction of a

wafer diameter away, the field created by the net wafer

charge is:

= k

′ Q r

(5)

where Q' is the net wafer charge, assumed to be

uniformly distributed, contained within the intersection

of a sphere of radius, r, and centered on the point of the

wafer closest to the particle.

R1-2.2.2.3 This equation indicates that the charge

distribution on the wafer can make a difference close to

the wafer. For an insulating wafer with a uniform

charge and a radius, R:

= E

= k

(6)