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SEMI P38-1103 © SEMI 2002, 2003 3 10 Sampling 10.1 Unless ot herwise sp ecified, appropriate sample sizes shall be selected from each lot in accordance with ANSI/ASQC Z1.4. Each quality characteristic shall be assigned a…

SEMI P38-1103 © SEMI 2002, 2003 2

4.1.9 multilayers —film stack with layer materials and

thickness values selected to produce high reflectivity of

incident EUV radiation. (See Figure 1.)

4.1.10 resist — layer of radiation-sensitive material

patterned in the lithography process for fabricating the

mask. See Figure 1.

4.1.11 underlayers — layer or layers between the

multilayers and the EUV mask substrate, which is

described by SEMI P37-1101. (See Figure 1.)

5 Ordering Information

5.1 Purchase orders must include the type of mask

blank. Table 1 shows the layers that are included in

each mask type.

5.2 Purchase orders for EUVL masks furnished to this

specification shall include the items listed in Table 2.

6 Area covered by requirements

6.1 Layer Quality Area — A layer quality area with

width, W

, and height, D

, shall be agreed upon

between user and supplier. Figure 2 shows the labeling

of the dimensions of the layer quality area. The layer

quality area may be smaller than the edge length, L, of

the mask substrate, which is defined in SEMI P37. The

layer quality area is the region where the multilayer

stack and absorber stack properties are specified in

Section 7. The multilayer, capping, absorber layer(s)

and buffer layer properties are also specified only in the

layer quality area.

6.1.1 Specifications for the layers and layer stacks

outside the layer quality area are agreed upon between

user and supplier.

6.2 Defect Quality Area — A defect quality area, with

width, W

, and height, D

, shall be agreed upon

between the user and supplier. Figure 3 shows the

labeling of the dimensions of the defect quality area.

The defect quality area may or may not be identical to

the area described in Section 9.1 of SEMI P37. The

defect quality area may be smaller than the edge length,

L, of the mask substrate, which is defined in SEMI P37.

The defect quality area is not necessarily the same as

the layer quality area described in Section 6.1.

6.2.1 Specifications for defects outside the defect

quality area are agreed upon between user and supplier.

7 Layer properties

7.1 The multilayer stack attributes and properties are

defined in Table 3. The EUV reflectivity requirements

are defined in Tables 4 and 5, and the EUV reflectivity

uniformity requirements are defined in Table 6. Figure

4 illustrates the EUV reflectivity parameters. The

median wavelength is defined as shown, and the peak

reflectivity might not occur at the median wavelength.

The optical properties of the multilayer stack at

wavelengths besides EUV wavelengths are defined in

Table 10.

7.2 The buffer layer requirements are shown in

Table 7. The optical properties of the buffer layer at

wavelengths besides EUV wavelengths are defined in

Table 10. The reflectivity requirements in Table 10

apply to the buffer layer as deposited on top of the

multilayer stack. By mutual agreement between the

user and supplier, the range of wavelengths for mean

reflectivity requirement may be reduced to a subset of

the range shown in Table 10.

7.3 The absorber layer requirements are defined in

Table 8.

7.4 The requirements for the absorber stack are defined

in Table 9. The optical properties of the absorber stack

at wavelengths besides EUV wavelengths are shown in

Table 11. The reflectivity requirements in Tables 9 and

11 apply to the absorber stack as deposited on top of the

multilayer stack. By mutual agreement between the

user and supplier, the range of wavelengths for mean

reflectivity requirement may be reduced to a subset of

the range shown in Table 11.

7.5 At all points on the backside of the mask blank, the

sheet resistance should be ≤ 100 Ohms/square. The

requirements for the conductive layer on the backside

of the substrate are shown in Table 12.

8 Defects

8.1 The multilayer stack must be inspected for defects

before deposition of the buffer layer and absorber

layer(s). The multilayer stack must meet the defect

requirements shown in Table 13.

8.2 The absorber stack must meet the defect

requirements shown in Table 14. For Type 3 mask

blanks, the resist and absorber stack must meet the

defect requirements shown in Table 14.

8.3 The location and size of all defects in the

mulitlayer or absorber stacks that were located by the

supplier will be provided to the user. The required

accuracy and reference point(s) for these locations will

be negotiated between user and supplier.

8.4 Mask blanks must meet the backside defect

requirements in Section 9.3 of SEMI P37.

9 Flatness Specifications

9.1 The flatness of the mask blank shall be agreed upon

between user and supplier.

SEMI P38-1103 © SEMI 2002, 2003 3

10 Sampling

10.1 Unless otherwise specified, appropriate sample

sizes shall be selected from each lot in accordance with

ANSI/ASQC Z1.4. Each quality characteristic shall be

assigned an acceptable quality level (AQL) in

accordance with ANSI/ASQC Z1.4 definitions for

critical, major, and minor classifications. If desired, and

so specified in the contract or order, each of these

classifications may alternatively be assigned cumulative

AQL values. The method of certification shall be

agreed upon between user and supplier.

11 Test Methods

11.1 Thickness  Method of measuring layer

thickness values to be agreed upon between user and

supplier.

11.2 Reflectivity  Method of measuring reflectivity at

specified wavelengths to be agreed upon between user

and supplier with these exceptions:

11.2.1 Each individual reflectivity measurement should

represent reflectivity over an area having rectangular

dimensions < 1 mm.

11.2.2 EUV reflectivity must be measured at 6 degrees

with respect to the normal to the plane of the mask

blank surface.

11.3 Stress  Method of measuring stress is to be

agreed upon between user and supplier.

11.4 Outgassing  Method of measuring outgassing

rate is to be agreed upon between user and supplier.

11.5 Etch Rates  Method of measuring etch rates and

etch selectivity is to be agreed upon between user and

supplier.

11.6 Defects  Method of inspection for defects is to

be agreed upon between user and supplier.

11.7 Flatness  Method of measuring flatness is to be

agreed upon between user and supplier.

11.8 Backside Sheet Resistance  Method of

measuring sheet resistance is to be agreed upon

between user and supplier.

11.9 Electrical Resistance  method of measuring

electrical resistance is to be agreed upon between user

and supplier.

12 Certification

12.1 Upon request of the purchaser in the contract or

order, a manufacturer’s or supplier’s certification that

the material was manufactured and tested shall be

provided in accordance with this specification.

13 Packing and Labeling

13.1 Mask blanks shall be packed in a Class 1

environment. Containers shall be designed to prevent

blank-to-blank contact and to protect the substrates

from contamination in handling and transit. Substrates

shall be shipped with the coated side facing toward the

same end of the box. This orientation shall be indicated

on each container. Packaging shall comply with the

applicable international, national, state laws, and local

regulations required for shipping.

13.2 Containers shall be labeled, “Warning: Open and

Handle Under Clean Room Conditions Only.” Each

shipment shall be identified by user purchase order

number, drawing number (if applicable), quantity,

supplier lot number, and material identification.

Material identification methodology to be agreed upon

between user and supplier.

13.3 Each mask blank shall be labeled with an

alphanumeric sequence that contains the items listed in

Table 15 in sequential order. No spaces will be

included, and each item listed in Table 15 shall be

separated by a dash in the text of the label. Note that

the class values for different properties of a mask blank

are determined individually.

Substrate

Absorber layer(s)

Buffer layer

Multilayer

Capping layer(s)

Patterned mask

Unpatterned mask or mask blank

Absorber

stack

Multilayer

stack

Underlayer(s)

Resist

Conductive layer

Multilayers

Figure 1

Definition of Absorber, Buffer, Capping Layer, Multilayers, Absorber Stack, and Multilayer Stack

Layer

quality

area

Figure 2

Dimensions of Layer Quality Area