semi合集-English.pdf - 第5397页

SEMI M57-0705 © SEMI 2004, 2005 1 SEMI M57-0705 GUIDE FOR SPECIFYING SI LICON ANNEALED WAFERS This guide was technically approved b y the global Silicon Wafer Com mittee. This edition was approved for publication by the …

100%1 / 7923
SEMI M56-1103 © SEMI 2003 11
The cost difference in operating Gauge A rather than Gauge B in this example is, on average, $1.45 per wafer.
Table R4-1 Empirical Distribution of SFQR Measurements and Calculations of
α
and
β
for Flatness
Measuring Gauges with P/T = 10% and P/T = 20%
SFQR f (x ) F (x )
(
µ
m) (PDF) (CDF) z
Φ
(z ) f (x )(1-
Φ
(z )) f (x )
Φ
(z ) z
Φ
(z ) f (x )(1-
Φ
(z )) f (x )
Φ
(z )
0.01 0 0.0000 0.0000 27.6923 1.0000E+00 0.0000E+00 0.0000E+00 13.8462 1.0000E+00 0.0000E+00 0.0000E+00
0.02 89 0.0050 0.0050 25.3846 1.0000E+00 0.0000E+00 5.0288E-03 12.6923 1.0000E+00 0.0000E+00 5.0288E-03
0.03 772 0.0436 0.0486 23.0769 1.0000E+00 0.0000E+00 4.3621E-02 11.5385 1.0000E+00 0.0000E+00 4.3621E-02
0.04 1,703 0.0962 0.1449 20.7692 1.0000E+00 0.0000E+00 9.6226E-02 10.3846 1.0000E+00 0.0000E+00 9.6226E-02
0.05 2,389 0.1350 0.2799 18.4615 1.0000E+00 0.0000E+00 1.3499E-01 9.2308 1.0000E+00 0.0000E+00 1.3499E-01
0.06 2,752 0.1555 0.4354 16.1538 1.0000E+00 0.0000E+00 1.5550E-01 8.0769 1.0000E+00 5.1791E-17 1.5550E-01
0.07 2,556 0.1444 0.5798 13.8462 1.0000E+00 0.0000E+00 1.4442E-01 6.9231 1.0000E+00 3.2112E-13 1.4442E-01
0.08 2,298 0.1298 0.7096 11.5385 1.0000E+00 0.0000E+00 1.2985E-01 5.7692 1.0000E+00 5.1858E-10 1.2985E-01
0.09 1,687 0.0953 0.8049 9.2308 1.0000E+00 0.0000E+00 9.5322E-02 4.6154 1.0000E+00 1.8720E-07 9.5321E-02
0.10 1,189 0.0672 0.8721 6.9231 1.0000E+00 1.4938E-13 6.7183E-02 3.4615 9.9973E-01 1.8045E-05 6.7165E-02
0.11 789 0.0446 0.9167 4.6154 1.0000E+00 8.7554E-08 4.4581E-02 2.3077 9.8949E-01 4.6846E-04 4.4113E-02
0.12 524 0.0296 0.9463 2.3077 9.8949E-01 3.1112E-04 2.9297E-02 1.1538 8.7572E-01 3.6797E-03 2.5928E-02
0.13
358 0.0202 0.9665 0.0000 5.0000E-01 1.0114E-02 1.0114E-02 0.0000 5.0000E-01 1.0114E-02 1.0114E-02
0.14 197 0.0111 0.9777 -2.3077 1.0508E-02 1.1014E-02 1.1697E-04 -1.1538 1.2428E-01 9.7478E-03 1.3834E-03
0.15 126 0.0071 0.9848 -4.6154 1.9639E-06 7.1194E-03 1.3982E-08 -2.3077 1.0508E-02 7.0446E-03 7.4812E-05
0.16 87 0.0049 0.9897 -6.9231 2.2234E-12 4.9158E-03 1.0930E-14 -3.4615 2.6860E-04 4.9145E-03 1.3204E-06
0.17 67 0.0038 0.9935 -9.2308 0.0000E+00 3.7857E-03 0.0000E+00 -4.6154 1.9639E-06 3.7857E-03 7.4348E-09
0.18 52 0.0029 0.9964 -11.5385 0.0000E+00 2.9382E-03 0.0000E+00 -5.7692 3.9938E-09 2.9382E-03 1.1735E-11
0.19 38 0.0021 0.9986 -13.8462 0.0000E+00 2.1471E-03 0.0000E+00 -6.9231 2.2234E-12 2.1471E-03 4.7740E-15
0.20 25 0.0014 1.0000 -16.1538 0.0000E+00 1.4126E-03 0.0000E+00 -8.0769 3.3307E-16 1.4126E-03 4.7049E-19
Sum = 17,698 1.0000
USL = 0.13
µ
m
For P/T = 10%,
σ
Μ
=
σ
A
= 0.10 x 0.13/3 = 0.00433
F
or P/T = 20%,
σ
Μ
=
σ
B
= 0.20 x 0.13/3 = 0.00867
P/T = 3
σ
Μ
/USL
α
A
= 1.0425E-02
α
B
= 1.4281E-02
β
A
= 1.1698E-04
β
B
= 1.4595E-03
P/T = 10% P/T = 20%
Count
NOTICE: SEMI makes no warranties or representations as to the suitability of the standards set forth herein for any
particular application. The determination of the suitability of the standard is solely the responsibility of the user.
Users are cautioned to refer to manufacturer's instructions, product labels, product data sheets, and other relevant
literature, respecting any materials or equipment mentioned herein. These standards are subject to change without
notice.
By publication of this standard, Semiconductor Equipment and Materials International (SEMI) takes no position
respecting the validity of any patent rights or copyrights asserted in connection with any items mentioned in this
standard. Users of this standard are expressly advised that determination of any such patent rights or copyrights, and
the risk of infringement of such rights are entirely their own responsibility.
Copyright by SEMI® (Semiconductor Equipment and Materials
International), 3081 Zanker Road, San Jose, CA 95134. Reproduction o
f
the contents in whole or in part is forbidden without express written
consent of SEMI.
SEMI M57-0705 © SEMI 2004, 2005 1
SEMI M57-0705
GUIDE FOR SPECIFYING SILICON ANNEALED WAFERS
This guide was technically approved by the global Silicon Wafer Committee. This edition was approved for
publication by the global Audits and Reviews Subcommittee on April 7, 2005. It was available at
www.semi.org in June 2005 and on CD-ROM in July 2005. Originally published July 2004; previously
published March 2005.
1 Purpose
1.1 A number of device manufacturers utilize silicon annealed wafers to gain improved device characteristics. This
guide provides information for developing specifications for silicon annealed wafers used to fabricate semiconductor
devices and integrated circuits.
2 Scope
2.1 This guide covers dimensional, electrical, chemical, and structural properties of silicon annealed wafers for
180 nm, 130 nm, and 90 nm device technology generations.
2.2 Based on the guidance herein, the user of the guide can generate specifications for silicon annealed wafers.
2.3 One of the reasons for using annealed wafers is to allow a reduction in the crystal originated particles (COP)
near the top surface region of the wafer. Currently, only the COP surface density can be estimated.
2.4 The width of the denuded zone (DZ) free of bulk micro defects (BMD) is also an important parameter.
However, there is no standardized method to evaluate this characteristic at the present time.
2.5 The complete EDI Code List for items in the Order Form appropriate to silicon wafers, including annealed
wafers, can be found in SEMI M18.
NOTICE: This standard does not purport to address safety issues, if any, associated with its use. It is the
responsibility of the user of this standard to establish appropriate safety and health practices and determine the
applicability of regulatory or other limitations prior to use.
3 Referenced Standards and Documents
3.1 SEMI Standards
SEMI M1 — Specifications for Polished Monocrystalline Silicon Wafers
SEMI M18 — Format for Silicon Wafer Specification Form for Order Entry
SEMI M33 — Test Method for the Determination of Residual Surface Contamination on Silicon Wafers by Means
of Total Reflection X-Ray Fluorescence Spectroscopy (TXRF)
SEMI M35 — Guide for Developing Specifications for Silicon Wafer Surface Features Detected by Automated
Inspection
SEMI M45 — Provisional Specification for 300 mm Wafer Shipping System
SEMI M53 — Practice for Calibrating Scanning Surface Inspection Systems Using Depositions of Monodisperse
Polystyrene Latex Sphere on Unpatterned Semiconductor Wafer Surfaces
SEMI M58 — Test Method for Evaluating DMA-Based Particle Deposition Systems and Processes
SEMI M59 — Terminology for Silicon Technology
SEMI MF81 — Test Method for Measuring Radial Resistivity Variation on Silicon Wafers
SEMI MF391 — Test Methods for Minority-Carrier Diffusion Length in Extrinsic Semiconductors by Measurement
of Steady-State Surface Photovoltage
SEMI MF523 — Practice for Unaided Visual Inspection of Polished Silicon Wafer Surfaces
SEMI MF951 — Test Method for Determination if Radial Interstitial Oxygen Variation in Silicon Wafers
SEMI M57-0705 © SEMI 2004, 2005 2
SEMI MF1239 — Test Methods for Oxygen Precipitation Characteristics of Silicon Wafers by Measurement of
Interstitial Oxygen Reduction
SEMI MF1530 — Test Method for Measuring Flatness, Thickness, and Total Thickness Variation on Silicon
Wafers by Automated Noncontact Scanning
SEMI MF1535 — Test Method for Carrier Recombination Lifetime in Silicon Wafers by Noncontact Measurement
of Photoconductivity Decay by Microwave Reflectance
SEMI MF1617 — Test Method for Measuring Surface Sodium, Aluminum, Potassium, and Iron on Silicon and Epi
Substrates by Secondary Ion Mass Spectroscopy
SEMI MF1726 — Practice for Analysis of Crystallographic Perfection of Silicon Wafers
SEMI MF1727 — Practice for Detection of Oxidation Induced Defects in Polished Silicon Wafers
SEMI MF1809 — Guide for Selection and Use for Etching Solutions to Delineate Structural Defects in Silicon
SEMI T3 — Specification for Wafer Box Labels
SEMI T7 — Specification for Back Surface Marking of Double-Side Polished Wafers with a Two-Dimensional
Matrix Code Symbol
3.2 JIS Standards
1
H 0609 — Test Methods of Crystalline Defects in Silicon by Preferential Etch Techniques
H 0614 — Visual Inspection for Silicon Wafers with Specular Surfaces
Z 8741 — Specular Glossiness–Method of Measurement
3.3 DIN Standards
2
50434 — Determination of Crystal Defects in Monocrystalline Silicon Using Etching Techniques on {111} and
{100} Surfaces
50443/1 — Recognition of Defects and Inhomogenities in Semiconductor Single Crystals by X-Ray Topography:
Silicon
3.4 ISO Standard
3
ISO 14706 — Surface Chemical Analysis – Determination of Surface Elemental Contamination on Silicon Wafers
by Total Reflection X-Ray Fluorescence Spectroscopy (TXRF) on silicon wafers by total reflection X-ray
fluorescence spectroscopy (TXRF)
3.5 ANSI Standards
4
ANSI/ASQC Z1.4 — Sampling Procedures and Tables for Inspection by Attributes
ANSI/EIA 556-B — Outer Shipping Container Standard
3.6 ASTM Standards
5
D 523 — Standard Test Method for Specular Gloss
E 122 — Standard Practice for Choice of Sample Size to Estimate the Average Quality of a Lot or Process
1 Japanese Industrial Standards, Available through the Japanese Standards Association, 1-24, Akasaka 4-Chome, Minato-ku, Tokyo 107-8440,
Japan. Telephone: 81.3.3583.8005; Fax: 81.3.3586.2014 Website: www.jsa.or.jp.
2 Deutches Institut für Normung e.V., standards are available in both English and German editions from Beuth Verlag GmbH, Burggrafenstrasse
6, 10787 Berlin, Germany, Telephone: 49.30.2601-0, Fax: 49.30.2601.1263, Website: www.beuth.de
3 International Organization for Standardization, ISO Central Secretariat, 1, rue de Varembé, Case postale 56, CH-1211 Geneva 20, Switzerland.
Telephone: 41.22.749.01.11; Fax: 41.22.733.34.30 Website: www.iso.ch.
4 American National Standards Institute, New York Office: 25 West 43rd Street, New York, NY 10036, USA. Telephone: 212.642.4900, Fax:
212.398.0023, Website: www.ansi.org
5 ASTM International, 100 Barr Harbor Drive, West Conshohocken, Pennsylvania 19428-2959, USA. Telephone: 610.832.9585, Fax:
610.832.9555, Website: www.astm.org