semi合集-English.pdf - 第5347页
SEMI M52-0703 © SEMI 2002, 2003 11 Item Recommended Specif ication Comments References 1.1.15 Other defects not required Protrusion, Flake, Chuck Mark, Misfit, Twin, Tweezer, Edge Chip, Edge Chip(peripheral), Edge Crack,…
SEMI M52-0703 © SEMI 2002, 2003 10
Item Recommended Specification Comments References
1.3.4 Layers (LTO, poly-Si), Epi
LTO: thickness: 150–900 nm
uniformity: ≤10%
Poly-si: thickness: ≤2 µm, uniformity:
<20 %
Epitaxial layer: customer specific
1.3.5 Wafer surface conditions
front side: polished, annealed, epitaxial
layer
backside: polished, acid and/or caustic
etched, layers according to 1.3.4
Annealing may affect
the surface roughness
of a Si wafer.
Evaluation of capture
rate with such a wafer
may not achieve the
specifications as
defined in Section 2.2
and Table 3, 1.2.1.
Table 3 Metrology Specific Equipment Characteristics
Item Recommended Specification Comments References
1. MEASUREMENT FUNCTIONS
1.1 Defect type
1.1.1 PSL sphere
required For reference SEMI M35
1.1.2 Particle
required SEMI M1
SEMI M35
1.1.3 COP
required
SEMATECH
TT 95082941A-TR
1.1.4 Mound (epi)
required ASTM F 1241
1.1.5 Mound (pw)
required
1.1.6 Pit
required
SEMI M35
SEMATECH
TT 95082941A-TR
1.1.7 Spike (epi)
required ASTM F 154
1.1.8 Stacking Fault (epi)
required ASTM F 154
1.1.9 Scratch
required
SEMI M35
SEMATECH
TT 95082941A TR
1.1.10 Slip
required ASTM F 1241
1.1.11 Dimple
required SEMI M1
1.1.12 Haze
required SEMI M1, M35
1.1.13 Slurry Ring
required
1.1.14 Stain
required ASTM F 1241
SEMI M52-0703 © SEMI 2002, 2003 11
Item Recommended Specification Comments References
1.1.15 Other defects
not required Protrusion, Flake,
Chuck Mark, Misfit,
Twin, Tweezer, Edge
Chip, Edge
Chip(peripheral), Edge
Crack, Edge Crown,
Nodule, Dopant
striation,
Gloss(specular),
Growth Ring,
Microroughness,
Orange Peel, Polishing
line, Saw Mark
1.2 System Performance for PSL
Spheres
1.2.1 Capture Rate
≥95%, 65 nm LSE and higher Wafer surface quality
must meet ITRS
requirements for 130
nm node.
SEMI M50
1.2.2 Sizing Dimension
65–2000 nm Dynamic Range
1.2.3 Count Level 3 Variability σ
3
<2.3%, 1 σ
>50, <150 LLS
count/wafer required
1.2.4 Count Matching Tolerance ∆
m
<2.6%
>50, <150 LLS
count/wafer required
1.2.5 Sizing error from interpolation
≤2% of mean diameter
65–200 nm LSE
see NOTE 1
1.2.6 Sizing Level 3 Variability σ
3
<2.3%, 1σ
65–200 nm LSE
1.2.7 Sizing Matching Tolerance
<2.3% 65–200 nm LSE
1.3 Threshold values for various defects
1.3.1 COP/Particle Classification
1.3.1.1 Classification Accuracy
≥90% For ≥80 nm LSE
1.3.1.2 Classification purity
≥95% For ≥80 nm LSE
1.4 Haze
SEMI M1
1.4.1 Level 3 Variability σ
3
<2%, 1σ
For polished and epi
wafers, average haze
1.4.2 Matching Tolerance ∆
m
<2.6% For polished and epi
wafers, average haze
1.5 Defect Coordinate, Inscribed
Reference
1.5.1 Bias
±20 µm
At minimum pitch
1.5.2 Level 3 Variability σ
3
10 µm, 1σ
At minimum pitch
1.5.3 Matching Tolerance ∆
m
13 µm At minimum pitch
1.6 Inspection Surface
1.6.1 Front side
User specific/selectable
1.6.2 Backside
User specific/selectable
SEMI M52-0703 © SEMI 2002, 2003 12
Item Recommended Specification Comments References
1.6.3 Wafer edge/ Bevel
User specific/selectable
2. SETUP PARAMETERS
2.1 FQA/edge exclusion
EE ≥1 mm, 200 and 300 mm wafers
FQA 200 mm wfrs: ≤198 mm
FQA 300 mm wfrs: ≤298 mm
p
erformance parameters
to be verified with EE
≥2 mm
2.2 Number of classification bins
arbitrary, definable,
cumulative, differential
2.2.1 LLS
10/channel
2.2.2 Bright Field Defects
10/channel
2.2.3 Haze
10/channel
2.2.4 Scratches
4/channel
2.2.5 Area Defects
4/channel
2.3 Sorting criteria
all parameters, all bins, separately and
combined
2.4 Exclusion windows
a) >5, curved/linear boundaries,
arbitrary position on entire wafer
surface
b)perimeter exclusion windows:
N zones with total area covered
≤0.001 of total wafer area in the radial
range R-2 mm to R,
total perimeter excluded at R-1 mm
≤4% of total wafer circumference, no
single zone longer than 5 mm.
a) e.g. laser mark
exclusion
b) e.g. edge gripping
exclusion
3. PERFORMANCE
3.1 Throughput
CoO issue
3.1.1 200 mm wafers
>140 wph for LLS ≥65 nm LSE
and ≥95% capture rate
3.1.2 300 mm wafers
>100 wph for LLS ≥65 nm LSE
and ≥95% capture rate
3.2 Downward compatibility
one generation Subject to limitations
imposed by changes in
geometry and number
of detectors.