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SEMI MF1771-0304 © SEMI 2003, 2004 11 As such, soft failure c riteria may be agree d upon between users of this test method i n order to meet individual nee ds of the testing. Following are exam ples of commonly used cri…

SEMI MF1771-0304 © SEMI 2003, 2004 10

RELATED INFORMATION 1

BACKGROUND OF METHOD

NOTICE: This related information is not an official part of SEMI MF1771. It was developed during the original

development of the document. This related information was approved for publication by full letter ballot on

December 4, 2003.

R1-1 Overview

R1-1.1 This is a voltage ramp test. It is most useful in

determining changes in a given process. It is intended

to be applied to arrays of similar capacitors on a silicon

wafer or group of wafers representing a process

condition specified by the user.

R1-2 Voltage Ramp

R1-2.1 While this test can, and might best be done

using a true linear voltage ramp, constraints of the

automated test equipment most often used in its

performance lead to widespread use of a staircase of

voltage steps to simulate the ramp. The ramp rate is

specified in terms of the rate of increase of the oxide

electric field. For oxides thicker than about 20 nm, the

oxide electric field has been commonly estimated by

dividing the applied voltage by the oxide thickness, but

for thinner films, significant errors may be introduced

by ignoring the effects of non-zero flat band voltage of

the MOS capacitor and voltages developed across the

silicon substrate (and the gate electrode as well, if it is

polysilicon) due to band bending and series resistance.

One approach to estimation of the relationship between

sample parameters and oxide field strength is found in

Section 10.2.

R1-3 Current Sampling

R1-3.1 In order to provide adequate breakdown field

strength resolution, it is specified that current readings

be taken after a maximum electric field change of 0.1

MV/cm. Taken together with the specified voltage

ramp rate, this leads to a maximum time between

current readings of 100 ms. In the case in which the

test is done using a voltage staircase, this implies use of

a 100-ms voltage step duration, with one current

reading taken at each step.

R1-4 Failure Criteria

R1-4.1 Both “hard” and “soft” failure criteria are

provided for in this test methods.

R1-4.2 Techniques for detection of hard oxide failure

for thin dielectrics may require high resolution, low

noise current-voltage data. For this reason, hard failure

criteria are defined in two measurement regimes, one

below and one above a threshold current level where

noise is reduced. This current level is commonly in the

range 1 nA to 0.1 µA for most test systems. Hard

failure criteria below the noise threshold level are

defined as follows:

R1-4.2.1 Current greater than or equal to 0.98 times

the compliance limit of the current score — This

condition signals total collapse of the capacitor.

R1-4.2.2 Current change by a factor of 1000 in a

single voltage step — Units with gross defects failing at

low voltages where currents are below the noise

threshold commonly fail with very large increases in

current.

R1-4.2.3 Consecutive current increases by a factor of

10 in each of two voltage steps — Test capacitors that

are initially highly conductive, as from a pinhole, often

do not display destructive breakdown, but rather show

steeply rising diodic leakage currents. This failure

criterion is designed to identify these defective units at

low voltage. Above the noise threshold current level,

the two criteria above remain in force, and two others

are added, as follows:

R1-4.2.4 Current change by a factor of 10 in a single

step — In the Fowler-Nordheim regime, current

changes are much less than this value for the small

increment in oxide field associated with a single voltage

step.

R1-4.2.5 Change in the logarithmic slope of the J-V

curve by a factor of 3 — This criterion becomes of

increasingly great value for oxide films thinner than 10

nm, where destructive breakdown is often accompanied

by very small changes in current, because of the very

low resistance of these oxides at very high fields (see

Standard 35-2).

R1-4.3 Another parameter associated with hard failure

is the hard failure current density, defined as the value

of the current at the last measurement point prior to

detection of hard failure, divided by the area of the

capacitor.

R1-4.4 Soft failures are associated with the passage of

a predetermined current through the capacitor under

test. This type of criterion has been traditionally used,

since in the past, passage of any measurable current

through an oxide was normally associated with hard

failure. More recently, where oxides have commonly

been capable of sustaining Fowler-Nordheim tunneling

conduction, use of such a criterion yields results

indicative of the uniformity of the samples being tested.

SEMI MF1771-0304 © SEMI 2003, 2004 11

As such, soft failure criteria may be agreed upon

between users of this test method in order to meet

individual needs of the testing. Following are examples

of commonly used criteria:

R1-4.4.1 V

crit

— The voltage associated with the noise

threshold current level.

R1-4.4.2 Vsoft fail = V at J = 100 mA/cm

— For

many oxides, this current level is close to hard failure,

but avoids the dispersion associated with high

resistance voltage drops at high breakdown currents.

R1-4.4.3 Vsoft fail = V at I = 1.5

A — This criterion

is widely used in Japan.

Other values of current or

current density may be used as soft failure criteria by

agreement of the parties to the test.

RELATED INFORMATION 2

SAMPLES AND TEST STRUCTURES

NOTICE: This related information is not an official part of SEMI MF1771. It was developed during the original

development of the document. This related information was approved for publication by full letter ballot on

December 4, 2004.

R2-1 Proper choice and fabrication of test structures

to be used with this test method is crucial to the success

of the testing. Because of the diverse group of intended

users, specific types of test devices or fabrication

procedures have not been stipulated. It is emphasized

that planning of any test procedure must include a

complete definition of the test structures, including

fabrication parameters such as silicon starting material,

insulator material, deposition technique, thickness,

isolation technique (planar, LOCOS, or direct moat),

electrode material, including thickness doping tech-

nique and level, sheet resistance, and sample geometry

(capacitor shape and area). All these parameters must

be included in the completed report of the experiment.

A good discussion of factors affecting the choice and

fabrication of test structures for this test may be found

in Standard 35-1.

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respecting any materials or equipment mentioned

herein. These standards are subject to change without

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