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SEMI M1-0305 © SEMI 1978, 2005 4 2.3 A co mplete purchase specification requires th at additi onal physical properties be specifi ed along with t est methods suit able for det ermining t heir magnit ude. This st andard p…

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SEMI M1-0305 © SEMI 1978, 2005 3
1 Purpose
1.1 Monocrystalline (single crystal) silicon wafers are utilized for essentially all integrated circuits and many other
semiconductor devices. To permit common processing equipment to be used in multiple device fabrication lines, it
is essential for the wafer dimensions to be standardized.
1.2 In addition, as technology advances to smaller and smaller dimensions for the elements of high density
integrated circuits, it has become of interest to standardize additional properties of the wafers.
1.3 This specification provides the essential dimensional and certain other common characteristics of silicon wafers,
including polished wafers as well as substrates for epitaxial and certain other kinds of silicon wafers.
2 Scope
2.1 These specifications cover ordering information and certain requirements for high-purity, monocrystalline
polished silicon wafers used in semiconductor device and integrated circuit manufacturing or as substrates (or
starting wafers) for other kinds of wafers, including epitaxial, annealed, and SOI wafers.
2.2 Dimensional requirements are provided for the following categories of polished wafers:
Category 1.1 2 in. polished monocrystalline silicon wafers with secondary flat
Category 1.2 3 in. polished monocrystalline silicon wafers with secondary flat
Category 1.5 100 mm polished monocrystalline silicon wafers, 525 m thick, with secondary flat
Category 1.6 100 mm polished monocrystalline silicon wafers, 625 m thick, with secondary flat
Category 1.7 125 mm polished monocrystalline silicon wafers with secondary flat
Category 1.8.1 150 mm polished monocrystalline silicon wafers with secondary flat and T/3 edge profile
template
Category 1.8.2 150 mm polished monocrystalline silicon wafers with secondary flat and T/4 edge profile
template
Category 1.9.1 200 mm notched polished monocrystalline silicon wafers with T/3 edge profile template
Category 1.9.2 200 mm notched polished monocrystalline silicon wafers with T/4 edge profile template
Category 1.10.1 200 mm flatted polished monocrystalline silicon wafers with T/3 edge profile template
without secondary flat
Category 1.10.2 200 mm flatted polished monocrystalline silicon wafers with T/4 edge profile template
without secondary flat
Category 1.11 100 mm flatted polished monocrystalline silicon wafers without secondary flat
Category 1.12 125 mm flatted polished monocrystalline silicon wafers without secondary flat
Category 1.13.1 150 mm flatted polished monocrystalline silicon wafers with T/3 edge profile template
without secondary flat
Category 1.13.2 150 mm flatted polished monocrystalline silicon wafers with T/4 edge profile template
without secondary flat
Category 1.15 300 mm notched polished monocrystalline silicon wafers
2.2.1 Values given for thickness, TTV, bow, and warp apply only to wafers prior to application of back surface
films, extrinsic gettering treatments, or other thermal treatments.
2.2.2 The dimensional characteristics of Category 1.10.1, 1.10.2, 1.11, 1.12, 1.13.1, and 1.13.2 wafers specified in
this document are identical with those specified in JEITA EM-3602, and the dimensional characteristics of Category
1.15 wafers are essentially equivalent with those specified in JEITA EM-3602.
SEMI M1-0305 © SEMI 1978, 2005 4
2.3 A complete purchase specification requires that additional physical properties be specified along with test
methods suitable for determining their magnitude. This standard provides a comprehensive listing of such
properties and associated test methods. This listing provides a systematic basis for constructing the purchase
specification for any kind of polished silicon wafer or substrate and is expected to be used for such purposes.
2.4 These specifications apply specifically to prime silicon wafers with at least one chem-mechanically polished
surface. Ground, lapped, and unpolished wafers are not covered in this specification but this specification may
provide guidance in connection with their procurement.
2.5 In addition, these specifications cover specification requirements for basic 300 mm diameter, double-side
polished silicon wafers that are suitable for many advanced integrated circuit applications. If this kind of wafer is
desired, physical properties other than those listed in the table of requirements shall not be included in the purchase
specification.
2.6 These specifications do not cover the requirements for the following related silicon materials and wafers:
Polycrystalline silicon (see SEMI M16 or JEITA EM-3601),
Epitaxial wafers (see SEMI M2 or SEMI M11),
Epitaxial wafers with buried layer (see SEMI M18),
Test wafers (see SEMI M8),
Premium wafers (see SEMI M24),
Reclaimed wafers (see SEMI M38),
Annealed wafers (see SEMI M57),
SOI wafers (see SEMI M34, SEMI M41, SEMI M47, or JEITA EM-3603),
Dielectrically isolated wafers (see SEMI M22), and
Solar-grade silicon wafers (see SEMI M6).
They do, however, provide the ordering information for test, premium, and reclaimed wafers, as well as the ordering
information for the polished substrates and starting wafers used to prepare epitaxial, annealed, and SOI wafers.
2.7 The complete EDI Code List for items in the Order Form appropriate to silicon wafers, including polished
wafers and substrates, can be found in SEMI M18.
2.8 For referee purposes, U.S. customary units shall be used for wafers of 2 in. and 3 in. nominal diameters, and SI
(system international, commonly called metric) units for 100 mm and larger diameter wafers.
NOTICE: This standard does not purport to address safety issues, if any, associated with its use. It is the
responsibility of the user of this standard to establish appropriate safety and health practices and determine the
applicability of regulatory or other limitations prior to use.
3 Referenced Standards
3.1 SEMI Standards
SEMI M2 — Specification for Silicon Epitaxial Wafers for Discrete Device Applications
SEMI M6 — Specification for Silicon Wafers for Use as Photovoltaic Solar Cells
SEMI M8 — Specification for Polished Monocrystalline Silicon Test Wafers
SEMI M11 — Specifications for Silicon Epitaxial Wafers for Integrated Circuit (IC) Applications
SEMI M12 — Specification for Serial Alphanumeric Marking of the Front Surface of Wafers
SEMI M13 — Specifications for Alphanumeric Marking of Silicon Wafers
SEMI M16 — Specification for Polycrystalline Silicon
SEMI M18 — Format for Silicon Wafer Specification Form for Order Entry
SEMI M1-0305 © SEMI 1978, 2005 5
SEMI M20 — Practice for Establishing a Wafer Coordinate System
SEMI M24 — Specification for Polished Monocrystalline Silicon Premium Wafers
SEMI M26 — Guide for the Re-use of 100, 125, 150, and 200 mm Wafer Shipping Boxes Used to Transport Wafers
SEMI M33 — Test Method for the Determination of Residual Surface Contamination on Silicon Wafers by Means
of Total Reflection X-Ray Fluorescence Spectroscopy (TXRF)
SEMI M34 — Guide for Specifying SIMOX Wafers
SEMI M35 — Guide for Developing Specifications for Silicon Wafer Surface Features Detected by Automated
Inspection
SEMI M38 — Specification for Polished Reclaimed Silicon Wafers
SEMI M40 — Guide for Measurement of Surface Roughness of Planar Surfaces on Silicon Wafer
SEMI M41 — Specification of Silicon-on-Insulator (SOI) for Power Device/ICs
SEMI M43 — Guide for Reporting Wafer Nanotopography
SEMI M44 — Guide to Conversion Factors for Interstitial Oxygen in Silicon
SEMI M45 — Provisional Specification for 300 mm Wafer Shipping System
SEMI M47 — Specification for Silicon-on-Insulator (SOI) Wafers for CMOS LSI Applications
SEMI M53 — Practice for Calibrating Scanning Surface Inspection Systems Using Depositions of Monodisperse
Polystyrene Latex Sphere on Unpatterned Semiconductor Wafer Surfaces
SEMI M57 — Guide for Specifying Silicon Annealed Wafers
SEMI M58 — Test Method for Evaluating DMA-Based Particle Deposition Systems and Processes
SEMI M59 — Terminology for Silicon Technology
SEMI MF26 — Test Methods for Determining the Orientation of a Semiconductive Single Crystal
SEMI MF28 — Test Methods for Minority-Carrier Lifetime in Bulk Germanium and Silicon by Measurement of
Photoconductive Decay
SEMI MF42 — Test Methods for Conductivity Type of Extrinsic Semiconducting Materials
SEMI MF81 — Test Method for Measuring Radial Resistivity Variation on Silicon Wafers
SEMI MF84 — Test Method for Measuring Resistivity of Silicon Wafers with an In-Line Four-Point Probe
SEMI MF391 — Test Methods for Minority Carrier Diffusion Length in Extrinsic Semiconductors by Measurement
of Steady-State Surface Photovoltage
SEMI MF523 — Practice for Unaided Visual Inspection of Polished Silicon Wafer Surfaces
SEMI MF525 — Test Method for Measuring Resistivity of Silicon Wafers Using a Spreading Resistance Probe
SEMI MF533 — Test Method for Thickness and Thickness of Variation of Silicon Wafers
SEMI MF534 — Test Method for Bow of Silicon Wafers
SEMI MF657 —Test Method for Measuring Warp and Total Thickness Variation on Silicon Wafers by Noncontact
Scanning
SEMI MF671 — Test Method for Measuring Flat Length on Wafers of Silicon and Other Electronic Materials
SEMI MF673 — Test Methods for Measuring Resistivity of Semiconductor Slices or Sheet Resistance of
Semiconductor Films with a Noncontact Eddy-Current Gage
SEMI MF847 — Test Methods for Measuring Crystallographic Orientation of Flats on Single Crystal Silicon
Wafers by X-Ray Techniques
SEMI MF928 — Test Methods for Edge Contour of Circular Semiconductor Wafers and Rigid Disk Substrates