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SEMI G2-94 © SEMI 1994 3 9 Test Methods 9.1 Seque nce of Events and Tes ts The sequen ce of testing sh ould be: 9.1.1 Deg rease 9.1.2 Metallu rg ical Bond Adhesion ( S ec tion 9.3.1) 9.1.3 F ram e Att ach 9.1.4 Die A tta…

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SEMI G2-94 © SEMI 1994 2
5 Dimensions
All Dimensioning and tolerancing shall conform to
Y14.5. Table 1 presents standard leadframe dimensions.
6 Materials
6.1 Leadframe Base Material — Tensile strength shall
be specified per MIL-I-23011.
6.1.1 Chemical Composition — Shall conform to the
requirements of MIL-M-385l0, Type A or B.
6.1.2 Material Tensile Strength — Shall be supplied
per MIL-I-23011.
6.2 Metallization — Aluminum
6.2.1 Thickness — 100 microinches minimum, 600
microinches maximum (micromin, micromaximum).
6.2.2 Coverage — 0.030" (0.762 mm) minimum;
measured from lead tip. Maximum to be determined by
ceramic size.
6.2.3 Composition
6.2.3.1 Clad Material — 99.4% minimum aluminum.
6.2.3.2 Vapor Deposition — 99.9% minimum
aluminum.
NOTE: The two types of aluminum may exhibit different
visual appearances and non-functional characteristics after
processing.
7 Defect Limits
7.1 Burrs
7.1.1 Horizontal
7.1.1.1 Bonding Area — 0.001" (0.025 mm) max.
7.1.1.2 Other Areas — 0.002" (0.051 mm) max.
7.1.2 Vertical
7.1.2.1 Bonding Area — 0.001" (0.025 mm) max.
7.1.2.2 Other Areas — 0.002" (0.051 mm) max.
7.2 Planarity/Coplanarity — Shall not exceed the
limits shown in Table 2.
7.3 Foreign Materials — Leadframes shall be clean
and free from foreign material such as photoresist,
lubricants, solvent residue, water marks, and rust spots.
Protective coatings acceptable to both vendor and user
are not considered foreign material.
7.4 Pits and Slug Marks
7.4.1.1 Bonding Area — 0.001" (0.025 mm) max.
surface dimension × 0.0005" (0.013 mm) maximum
depth.
7.4.1.2 Other Areas — 0.010" (0.254 mm) max.
surface dimension × 0.0005" (0.013 mm) maximum
depth.
7.5 Projections
7.5.1 Bonding Area — None allowed.
7.5.2 Other Areas — .010" (.254 mm) max. surface
dimension × 0.002" (0.015 mm) maximum height.
7.6 Scratches — There shall be no scratches in the
aluminum metallization that penetrate to the underlying
base material.
7.7 Voids — All metallized areas of the leadframe
within the bonding area shall have no voids larger than
0.001" (0.025 mm) in any dimension.
7.8 Twist (formed leadframe strip ) — 0.004 inch per
inch (0.102 mm).
7.9 Coining
7.9.1 Coined Depth — Minimum 0.0005" (0.013 mm);
maximum 0.002" (0.051 mm). Minimum coined depth
may be controlled by minimum flat area.
7.9.2 Coined Flat Area — Minimum of 80% of
normal lead width; measured 0.005" (0.127 mm) back
from lead tip.
7.9.3 Coined Length — Minimum 0.025" (0.635 mm)
from lead tip.
7.10 Lead Position
7.10.1 Lead Position — A 0.007" (0.178 mm)
diameter circle must be 100% within nominal lead
position when centered at lead nominal centerline and
0.007" (0.178 mm) back from lead tip.
7.10.2 Minimum Spacing — 0.006" (0.152 mm)
minimum.
7.11 Bowing
7.11.1 Convex — 0.0025 inch per inch (0.0025 mm
per mm) maximum.
7.11.2 Concave — 0.0025 inch per inch (0.0025 mm
per mm) maximum.
7.12 Camber — 0.005 inch per inch (0.005 mm per
mm) maximum.
NOTE: Items 7.11 and 7.12 refer to scored strips only.
8 Sampling
Sampling will be determined between vendor and
customer.
SEMI G2-94 © SEMI 19943
9 Test Methods
9.1 Sequence of Events and Tests
The sequence of testing should be:
9.1.1 Degrease
9.1.2 Metallurgical Bond Adhesion (Section 9.3.1)
9.1.3 Frame Attach
9.1.4 Die Attach
9.1.5 Bond
9.1.6 Pre-Seal Bond Pull (Section 9.3.2)
9.1.7 Seal
9.1.8 Mechanical Testing (Section 9.2)
9.1.9 Lead Trim
9.1.10 Post-Seal Bond Pull (Section 9.3.2)
NOTE: It is acknowledged that the leadframe manufacturer
may not perform all these tests due to equipment and
component limitations. Regardless, leadframes must fulfill
these requirements, subject to the influence of the testing
facility and associated components.
9.2 Mechanical and Thermal
9.2.1 Temperature Cycling — Per MIL-STD-883,
Method 1010.4, Condition C.
9.2.2 Thermal Shock — Per MIL-STD-883, Method
1011.2, Condition C.
9.2.3 Centrifuge — Per MIL-STD-883, Method
2001.2, Condition E.
9.2.4 Lead Integrity
9.2.4.1 A 500°C ± 20° - 55% R.H. heat soak for 15
minutes ± 1 minute. Cooled at no more than 50°C per
minute. Afterwards the frame is clamped between
plates of a suitable size for the lead spacing (see Section
9.2.4.2). Then (3) 90° cycles are performed. Frames are
examined at 20× magnification and if cracks are
observed at the Apex A (Figure 3), then the frame is
rejected.
9.2.4.2 Plate shall be of equivalent plan-form to the
ceramic being employed for the particular frame. An
edge radius equivalent to 2T, where T is the leadframe
thickness, shall be on the contacting surface of the
plate.
9.3 Functional Test Methods
9.3.1 Metallurgical Bond Adhesion Aluminization —
The metallurgical bond between the aluminization and
the base metal shall permit the leadframe to be heated
in air to 525°C ± 10°C for five (5) minutes minimum
without evidence of aluminum peeling, blistering, or
discoloring when viewed at 20× magnification. (Dis-
coloration must not jeopardize the user’s standard part
reliability.) Subsequently, the aluminized layer must
pass the following two adhesion tests:
9.3.1.1 A cellophane type adhesive tape is firmly
applied to the aluminization and removed toward the
center of the cavity in a continuous rapid motion. This
test is to be performed over the same area three times.
No evidence of aluminum separation from the base
metal shall be visible at 20× magnification
9.3.1.2 The aluminization shall be capable of passing a
functional wirebond test without separating.
9.3.2 Lead Bond Quality — Minimum pre-seal and
post-seal bond strength test per MIL-STD-883, Method
2011.2, Test Condition D. Applicable failure
categories: A-4 and A-6.
10 Packaging and Marking
10.1 Packaging — The shipping containers and
materials shall be suitably designed to provide the
singulated components with protection against normal
transportation damage risks which include crushing,
abrasion and spillage, and exposure to moisture and
other corrosive gases. The inner packing materials must
not cause particulate contamination on the components
and shall be clean-room compatible as defined by the
customer. The components, in packing trays, shall be
sealed in a vacuum bag with a dessicant.
10.2 Packing List
10.2.1 Internal Packages — Each internal package
shall be marked as follows:
User Part Number
User Purchase Order Number
Drawing Number (User’s and Supplier’s, if
appropriate)
Supplier Shipping Lot Number
Quantity
Date of Manufacture
10.2.2 External Packages — The Packing List, located
on the outside of the container, shall provide the
following information:
User’s Part Number
User’s Purchase Order Number
Quantity
Shipping Date
Any specific instructions for receiving dock
personnel.
SEMI G2-94 © SEMI 1994 4
Table 1 Typical Ceramic Cer-DIP Metallic Leadframes Dimension and Tolerance Requirements
Description Cavity Length Cavity Width Lead-Formed Width, Top
Bond Finger Layout
End vs. Side
Nominal
Progression Unit
8SSI - 0.120 ± 0.007 0.311 ± 0.003 0 4 0.945 in
3.05 ± 0.178 7.90 ± 0.076 24.00 mm
8MSI - 0.140 ± 0.007 0.311 ± 0.003 0 4 0.945 in
3.56 ± 0.178 7.90 ± 0.076 24.00 mm
8LSI - 0.160 ± 0.007 0.311 ± 0.003 0 4 0.945 in
4.06 ± 0.178 7.90 ± 0.076 24.00 mm
14SSI 0.160 ± 0.007 0.120 ± 0.007 0.311 ± 0.003 4 3 0.945 in
4.06 ± 0.178 3.05 ± 0.178 7.90 ± 0.076 24.00 mm
14MSI 0.260 ± 0.007 0.140 ± 0.007 0.311 ± 0.003 4 3 0.945 in
6.60 ± 0.178 3.56 ± 0.178 7.90 ± 0.076 24.00 mm
16SSI 0.160 ± 0.007 0.120 ± 0.007 0.311 ± 0.003 4 4 0.945 in
4.06 ± 0.178 3.05 ± 0.178 7.90 ± 0.076 24.00 mm
16MSI 0.260 ± 0.007 0.140 ± 0.007 0.311 ± 0.003 4 4 0.945 in
6.60 ± 0.178 3.56 ± 0.178 7.90 ± 0.076 24.00 mm
16LSI 0.260 ± 0.007 0.170 ± 0.007 0.311 ± 0.003 4 4 0.945 in
6.60 ± 0.178 4.32 ± 0.178 7.90 ± 0.076 24.00 mm
16SLSI 0.360 ± 0.007 0.170 ± 0.007 0.311 ± 0.003 4 4 0.945 in
9.14 ± 0.178 4.32 ± 0.178 7.90 ± 0.076 24.00 mm
16VLSI 0.330 ± 0.007 0.180 ± 0.007 0.311 ± 0.003 6 2 0.945 in
8.38 ± 0.178 4.57 ± 0.178 7.90 ± 0.076 24.00 mm
18MSI 0.260 ± 0.008 0.140 ± 0.008 0.311 ± 0.003 4 5 1.061 in
6.60 ± 0.203 3.56 ± 0.203 7.90 ± 0.076 26.95 mm
18LSI 0.260 ± 0.008 0.170 ± 0.008 0.311 ± 0.003 6 3 1.061 in
6.60 ± 0.203 4.32 ± 0.203 7.90 ± 0.076 26.95 mm
18VLSI 0.330 ± 0.008 0.180 ± 0.008 0.311 ± 0.003 6 3 1.061 in
8.38 ± 0.203 4.57 ± 0.203 7.90 ± 0.076 26.95 mm
20MSI 0.210 ± 0.008 0.140 ± 0.008 0.311 ± 0.003 4 6 1.175 in
5.33 ± 0.203 3.56 ± 0.203 7.90 ± 0.076 29.85 mm
20LSI 0.260 ± 0.008 0.170 ± 0.008 0.311 ± 0.003 6 4 1.175 in
6.60 ± 0.203 4.32 ± 0.203 7.90 ± 0.076 29.85 mm
20VLSI 0.330 ± 0.008 0.175 ± 0.008 0.311 ± 0.003 6 4 1.175 in
8.38 ± 0.203 4.45 ± 0.203 7.90 ± 0.076 29.85 mm
22MSI 0.270 ± 0.010 2.10 ± 0.010 0.411 ± 0.003 6 5 1.250 in
6.86 ± 0.254 5.33 ± 0.254 10.44 ± 0.076 31.75 mm
22LSI 0.310 ± 0.010 0.240 ± 0.010 0.411 ± 0.003 6 5 1.250 in
7.87 ± 0.254 6.10 ± 0.254 10.44 ± 0.076 31.75 mm
22VLSI 0.350 ± 0.010 0.260 ± 0.010 0.411 ± 0.003 8 3 1.250 in
8.89 ± 0.254 6.60 ± 0.254 10.44 ± 0.076 31.75 mm
24MSI 0.260 ± 0.010 0.260 ± 0.010 0.611 ± 0.003 6 6 1.510 in
8.38 ± 0.254 6.60 ± 0.254 15.01 ± 0.076 38.35 mm
24LSI 0.330 ± 0.010 0.285 ± 0.010 0.611 ± 0.003 6 6 1.510 in
8.38 ± 0.254 7.24 ± 0.254 15.01 ± 0.076 38.35 mm
24VLSI 0.420 ± 0.010 0.290 ± 0.010 0.611 ± 0.003 6 6 1.510 in
10.67 ± 0.254 7.37 ± 0.254 15.01 ± 0.076 38.35 mm
24SD3S 0.260 ± 0.010 0.170 ± 0.010 0.311 ± 0.003 6 6 1.510 in
6.60 ± 0.254 4.32 ± 0.254 7.90 ± 0.076 38.35 mm