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SEMI G22-1296 © SE MI 1980, 1996 1 SEMI G22-1296 SPECIFICA TION FOR CERAMIC PIN GRID A RR A Y P A CKAGES 1 Purpose This specification defines the acceptance criteria for cofired ceramic pin grid array packages. 2 Scope T…

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SEMI G21-94 © SEMI 1980, 19965
NOTICE: These standards do not purport to address
safety issues, if any, associated with their use. It is the
responsibility of the user of these standards to establish
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mentioned herein. These standards are subject to
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SEMI G22-1296 © SEMI 1980, 19961
SEMI G22-1296
SPECIFICATION FOR CERAMIC PIN GRID ARRAY PACKAGES
1 Purpose
This specification defines the acceptance criteria for
cofired ceramic pin grid array packages.
2 Scope
This specification includes the visual, dimensional, and
functional requirements for the ceramics PGA package.
3 Referenced Documents
3.1 Military Standards
1
MIL-G-45204 — Gold Plating, Electrodeposited
MIL-I-23011 — Iron Nickel Alloys for Sealing to
Glasses and Ceramics
MIL-PRF-38535 — Integrated Circuits (Microcircuits)
Manufacturing, General Specification for
MIL-STD-105 — Sampling Procedures and Tables for
Inspection by Attributes
MIL-STD-883 — Test Methods and Procedures for
Microelectronics
MIL-STD-1835 — Interface Standard for Microcircuit
Case Outlines
MIL-STD-7883 — Brazing
QQ-N-290A — Nickel Plating
3.2 Other Documents
ANSI Y14.5
2
— Dimensioning and Tolerancing
JEDEC Pub. No. 95
3
— Registered and Standard
Outlines for Semiconductor Devices
4 Terminology
4.1 blister (bubble) ceramic — Any separation within
the ceramic which does not expose underlying ceramic
material.
4.2 blister (bubble) metal — Any localized separation
within the metallized or between the metallization and
ceramic which does not expose underlying metal or
ceramic material.
1 Military Standards, Naval Publications and Form Center, 5801
Tabor Ave., Philadelphia, PA 19120
2 ANSI, 1430 Broadway, New York, NY 10018
3 JEDEC, 2500 Wilson Blvd., Arlington, VA 22201-3834
4.3 braze — An alloy with a melti ng point equal to or
greater than 450°C.
4.4 burr — An adherent fragment of excess parent
material, either horizontal or vertical, adhering to the
component surface.
4.5 chip — A region of ceramic missing from the
surface or edge of a package which does not go
completely through the package. Chip size is given by
its length, width, and depth from a projection of design
plan form (Figure 1).
Figure 1
Chip Illustration
4.6 cofired — A process or technology for
manufacturing products in which the ceramic and
refractory metallizations are fired simultaneously.
4.7 contact pad — That metallized pattern that
provides mechanical or electrical connection to the
external circuitry.
4.8 crack — A cleavage or fracture that extends to the
surface of a package. It may or may not pass through
the entire thickness of the package.
4.9 delamination — The separation of the individual
layers of the ceramic.
4.10 die attach area — A dimensional outline
designated for die attach.
4.11 discoloration — Any change in the color of the
package plating or metallization as detected by the
unaided eye which normally appears after the
application of heat per Section 8.7.1.
4.12 flatness — The allowable deviation of a surface
from a reference plane. The tolerance zone is defined
by two parallel planes within which the surface must
lie.
4.13 footprint — Pin pattern.
4.14 foreign material — An adherent particle other
than parent material of that component.
SEMI G22-1296 © SEMI 1980, 1996 2
4.15 isolation gap — Metal-free space between
conductive areas.
4.16 layer — A dielectric sheet with or without
metallization that performs a discrete function as part of
the package.
4.17 peeling (flaking) — Any separation of
metallization from the base material that exposes the
base material.
4.18 pit — Any unspecified depression in the package.
4.19 projection — An adherent fragment of excess
parent material on the component surface.
4.20 pullback — A dimension cove ring the linear
distance between the edge of the ceramic and the first
measurable metallization (see Figure 2).
Figure 2
Metallization Misalignment
4.21 rundown — The linear distance down a vertical
surface from the top to the point of maximum
metallization overhang (see Figure 2).
4.22 seal area — A dimensional outline area
designated for either metallization or bare ceramic to
provide a surface area for sealing.
4.23 seating plane — As defined by the standoff
features or the package base plane if no standoff is used
(see Figure 3).
Figure 3
Seating Plane
4.24 standoff — The designed separation between the
base plane and the seating plane created by a physical
feature. Standoff use, configuration, and placement is
optional (see Figure 3).
4.25 terminal — Metallization at the point of electri
cal contact to package internal circuitry.
4.26 TIR — Total indicator reading.
4.27 voids — An absence of refractory metallization,
braze, or plating material from a designated area greater
than 0.002" (0.051 mm) in diameter.
5 Ordering Information
Purchase orders for pin grid array packages furnished to
this specification shall include the following items:
1. Drawing number and revision level
2. Certification requirements
3. Quantity
4. Reference to this document
5. Any exceptions to print or specifications
6 Dimensions and Permissi ble Variations
The dimensions of the pin grid array package shall
conform to the SEMI Standards or to the customer
drawing and be within the outline of the appropriate
JEDEC standard. Refer to MIL-PRF-38535 and MIL-
STD-1835.
7 Material Parameters
The definitions, defects, and functional testing
described in this specification relate directly to a
nominal package made with the following materials.
They may also be applicable to similar pin grid array
packages made with other materials.
7.1 Ceramic Properties
7.1.1 Materials — Alumina content 90% minimum.
Beryllia content to be determined.
7.1.2 Color — Dark or white.
7.2 Metal Properties
7.2.1 Metallized circuits and areas shall be refractory
metal tungsten, molybdenum, or an approved
equivalent, 0.0003" (0.00762 mm) minimum thickness.
7.2.2 Finish shall be per MIL-PRF-38535 and MIL-
STD-1835; Nickel Plating (if designated) shall be per
QQ-N-290A, 50 µ"–350 µ" (0.0013 mm–0.00889 mm).
Gold plating shall conform to MIL-G-45204, Type III
and 50 µ"–225 µ" (0.0013 mm–0.00508 mm).
7.2.3 Braze shall be per MIL-STD-7883.
7.2.4 Pin Material — Iron nickel cobalt alloy per
MIL-PRF-38535 and MIL-STD-1835, Type A (Kovar).
Iron nickel alloy per MIL-PRF-38535 and MIL-STD-
1835, Type B (Alloy 42). Phosphor bronze per ASTM
B159.