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SEMI M47-0704 © SEMI 2001, 2004 6 reflectometry, have p roven useful both for su rface silicon layer and buried oxide (BOX) layer thickn ess measurements. Both techniqu es use reflecte d light to allow deductio n of the …

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SEMI M47-0704 © SEMI 2001, 2004 5
Specification Units Item
SIMOX Bonded
Standard
reference
Test method
26. BOX CHARACTERISTICS
26.1 BOX Thickness
≤ 0.4 (µm)
See NOTE 1.
≤ 0.4 (µm)
See NOTE 1.
Spectroscopic
ellipsometry,
Spectroscopic
reflectometry
26.2 BOX Thickness Variation
≤ ± 5 (%) ≤ ± 5 (%)
Spectroscopic
ellipsometry,
Spectroscopic
reflectometry
26.3 Bonded Interface Location
NA See NOTE 1.
26.4 BOX Pinholes < 0.5 (/cm
2
) (LD)
< 0.1 (/cm
2
) (HD)
< 0.1 (/cm
2
) Cu plating, BOX
capacitor
26.5 Dielectric Breakdown > 5 (MV/cm) > 6 (MV/cm) BOX capacitor
27. MECHANICAL CHARACTERISTICS
27.1 Warp < 40 (µm) (LD)
< 50 (µm) (HD)
< 40 (µm) SEMI MF1390 Automated noncontact
scanning
27.2 Flatness-site See NOTE 1.
(Refer to SEMI
M18.)
See NOTE 1.
(Refer to SEMI M18.)
28. FRONT SURFACE VISUAL INSPECTION CHARACTERISTICS
28.1 Scratch None None SEMI MF523 Visual inspection
28.2 Haze None None SEMI MF523 Visual inspection
28.3 LLS
@particle size
≤ 0.3 (/cm
2
) @ >
0.25 µm
≤ 0.3 (/cm
2
) @ > 0.2
µm
SEMI MF523 Automated particle
counter
28.4 Slip See NOTE 1. See NOTE 1. SEMI MF523 Visual inspection
28.5 Edge Chip SEMI M1 SEMI M1 SEMI MF523 Visual inspection
28.6 Edge Crack SEMI M1 SEMI M1 SEMI MF523 Visual inspection
28.7 Foreign Matter See NOTE 1. See NOTE 1. SEMI MF523 Visual inspection
29. BACK SURFACE CHARACTERISTICS
29.1 Backside Metal
Contamination (Fe, Cr,
Ni, Cu)
< 1 × 10
11
(/cm
2
)
for each atom
< 1 × 10
11
(/cm
2
) for
each atom
AAS, ICP-MS
NOTE 1: to be specified or discussed between users and suppliers
NOTE 2: typically 0.1 µm and thicker SOI are specified. Thinner SOI is to be discussed between users and suppliers.
NOTE 3: It is specified by a distance from the FQA boundary to the periphery of a base wafer of nominal dimensions. It is not a distance from an
edge of an SOI layer.
NA: not applicable
LD: Low dose SIMOX
with BOX thickness ≤ 200 nm
HD: High dose SIMOX with BOX thickness > 200 nm
7 Sampling Plan
7.1 Unless otherwise specified, ASTM Practice E 122
shall be used. When so specified, appropriate sample
sizes shall be selected from each lot in accordance with
ANSI/ASQC Z1.4. Each quality characteristic shall be
assigned with an acceptable quality level (AQL) of lot
tolerance percent defective (LTPD) value in accordance
with ANSI/ASQC Z1.4 definitions for critical, major,
and minor classifications. If desired and so specified in
the contract or order, each of these classifications may
alternatively be assigned cumulative AQL or LTPD
values. Inspection levels shall be agreed upon between
users and suppliers.
8 Test Methods
8.1 Thickness of Surface Silicon Layer and Buried
Oxide Layer
8.1.1 Measurement Methods Two non-contact, non-
destructive optical characterization techniques,
spectroscopic ellipsometry (SE) and spectroscopic
SEMI M47-0704 © SEMI 2001, 2004 6
reflectometry, have proven useful both for surface
silicon layer and buried oxide (BOX) layer thickness
measurements. Both techniques use reflected light to
allow deduction of the thickness and refractive index of
thin layers. In both cases, layer thickness and index of
refraction data must be “backed out” of the measured
optical data by a process of successive approximation.
Silicon islands in the BOX layer of SIMOX and
interface non-uniformity make these techniques less
reliable.
8.1.1.1 Spectroscopic Ellipsometry (SE) Measurement
— In this measurement, white light from a xenon arc
lamp passes through a polarizing rotating filter and
illuminates the sample site under study; reflected light
passes through an analyzer to a monochrometer and
photomultiplier detector. For each wavelength,
reflectivity oscillates with polarizer rotation; the
magnitude and phase of reflectivity changes are
measured to determine ellipsometric angles, δ and Ψ.
The two measured spectra are fit by successive
approximation to allow determination of the surface
silicon layer and BOX layer thickness and oxide
composition. For SE, the choice of instrument and
associated model and fitting parameters affect the
confidence-of-fit, so they should be taken into account
in the user-supplier agreement.
8.1.1.2 Spectroscopic Reflectometry Measurement —
In this measurement, light from a xenon arc lamp
passes through a grating monochrometer or optical
band-pass filters and illuminates the sample site under
study; reflected light is gathered by a detector. Specular
reflectivity is plotted as a function of wavelength from
0.4 µm to 1.1 µm. The analysis proceeds by making
successively better approximations to index of
refraction and absorption of each layer until an
acceptable fit is achieved. Measurements are made with
a reflectance mode optical interferometer.
8.1.1.3 Optical Model Fitting and Correlation —
There are slight, systematic differences between layer
thickness measured by SE and spectroscopic
reflectometry. Because of this, users and suppliers
should specify the actual measurement method to be
used. The two methods offer results which are
reproducible and well-correlated with each other over a
wide range of conditions. If both measurement
techniques are used, it is recommended that the
reflectance system measurements should be calibrated
to fit the results of the SE.
8.1.2 Measurement Positions The measurement
strategy is to make a detailed measurement with an
accurate fit on at least nine wafer sites, for example, the
wafer center, four points at half of the wafer radius and
four points at 10 mm from the wafer edge. The number
and position of wafer sites to be monitored should be
agreed on between users and suppliers. Generally, the
greater the variability relative to the mean, the larger
the number of sites that should be monitored. In each
case, the measurement system supplies a “goodness-of-
fit" parameter that indicates a level of confidence in the
fit to the measured data.
8.1.3 Surface Silicon Layer and Buried Oxide (BOX)
Layer Thickness — Spectra for each site are fit
independently with both the surface silicon and BOX
layer thickness as adjustable parameters. Both the mean
thickness and the uniformity should be specified.
8.1.4 Surface Silicon Thickness Mean Value Variation
8.1.4.1 After surface silicon
layer thickness is
measured for predetermined number of wafers and
mean value of surface silicon thickness is derived for
each wafer, the maximum and the minimum values are
chosen, and then the variation (nm) is calculated as;
± (Maximum mean value – Minimum mean value) / 2
8.1.4.2 In case of quite large number of wafers (ex. a
few hundreds), the variation (mm) can be calculated as;
± 3σ (3 times of the standard deviation)
under agreement between users and suppliers.
8.1.5 Surface Silicon Thickness Variation in Wafer
8.1.5.1 After surface silicon layer thickness is
measured at predetermined number of points within an
SOI wafer, the maximum and the minimum values are
chosen, and then the variation (nm) is calculated as ;
± (Maximum value – Minimum value) / 2
8.1.5.2 In case of multi-points measurements (ex. a few
hundreds) within an SOI wafer, the variation (nm) can
be calculated as;
± 3σ (3 times of the standard deviation)
under agreement between users and suppliers.
8.1.6 Buried Oxide (BOX) Thickness Variation
8.1.6.1 After BOX thickness is measured for
predetermined number of points on predetermined
number of wafers, the maximum and the minimum
values are chosen, and then the variation (%) is
calculated as;
± (Maximum value – Minimum value) × 100 / (2 ×
mean value)
8.1.6.2 In case of multi-points measurements (ex. a few
hundreds) within an SOI wafer or quite large number of
wafers (ex. a few hundreds), the variation (%) can be
calculated as;
± 3σ (3 times of the standard deviation) × 100 / (mean
value)
under agreement between users and suppliers.
SEMI M47-0704 © SEMI 2001, 2004 7
8.2 Dopant Concentration
8.2.1 Secondary Ion Mass Spectroscopy (SIMS) is
utilized to determine dopant concentration in surface
silicon layer.
8.2.2 The acceptable dopant concentrations are to be
determined by agreement between users and suppliers.
8.3 Defects in Surface Silicon Layer
8.3.1 SOI Etch Pit
8.3.1.1 Defects in surface silicon layer including
stacking faults, threading dislocations and other crystal
defects are evaluated by destructive chemical etching
and microscopic etch pit density measurements. The
appropriate evaluation procedure for SOI wafers, which
depends on type of defects targeted and thickness of
surface silicon layers, is determined by agreement
between users and suppliers.
8.3.1.2 Following are examples of the evaluation on
SIMOX wafers and bonded wafers.
8.3.1.3 Example 1 — SOI etch pit evaluation in
SIMOX wafers: Samples are first immersed in HF to
remove oxide from the surface. Then the samples are
etched by Secco etch. In the case of a relatively thick
SOI layer such as 170–200 nm, freshly prepared
standard Secco Etch can be used: one part (by volume)
of a 0.15 molar solution of K
2
Cr
3
O
7
in distilled water
and two parts HF (49%). In the case of a thin SOI layer
below 100 nm, the samples are etched for 30 seconds in
the solution
5
: 50 ml of HF (49%) plus 80 ml of HNO
3
(61%) plus 160 ml of H
2
O [K
2
Cr
2
O
7
1g +
Cu(NO
3
)
2
⋅3H
2
O 4g] (a sort of diluted Secco etch). For
both cases, the etching should continue until 50 nm of
the surface Si remains. After the etching and rinsing in
water, samples are dipped in HF (49%) for 5 minutes.
The HF etches the buried oxide and creates cavities
under the etch pits. The number of etch pits is counted
through optical microscope. The etch pits include
various defects such as threading dislocations and
stacking fault pyramid.
8.3.1.4 Example 2 — SOI etch pit evaluation in bonded
SOI wafers fabricated by delamination followed by
CMP: SOI etch pit density increases when remaining
SOI thickness after Secco etching is thinner and
thinner. SOI layers thicker than 150 nm are usually
etched down to 50 nm by Secco etching before SOI
etch pits are counted. These pits are detected when
selectively etched depth or the size of defects is larger
than SOI layer thickness remaining after Secco etching.
Thus, damages deeper than 50 nm or defects larger than
50 nm can be detected. These pits come from defects
5 L. F. Giles, A. Nejim, and P. L. F. Hemment, Materials Chemistry
and Physics, vol.35, p. 129, 1993.
contained in original silicon material and/or damages or
defects induced in SOI fabrication process. The former
includes COP, bulk micro defects, oxygen precipitates,
and so on. The latter includes CMP damages, defects
induced by heat cycles and so on, as possibility. To
define origins of SOI etch pits, their distribution in
depth of SOI layers and/or that on a wafer should be
evaluated. For example, CMP damages may be
localized on surface of SOI layers. By etching SOI
surfaces up to desired depth with using non-selective
etching such as KOH followed by Secco etching, etch
pits due to CMP damages disappear. The depth
distribution of defects or damages can be evaluated in
this manner.
6
8.3.1.5 Example 3 — SOI etch pit evaluation in bonded
SOI wafers formed by epitaxial layer transfer
technology: In this case, there is no COP, bulk micro
defects, and oxygen precipitates in the SOI layer
because it is made of epitaxially grown Si on porous Si.
In addition, mechanical damage related defect is not
introduced, since the SOI surface is smoothed out by
hydrogen annealing instead of polishing. The major
defect in this type of SOI wafers is same sided
pyramidal stacking fault, that is induced at the initial
stage of the epitaxy, and is grown through the epitaxy
with upside-down pyramidal shape
7
, and then is turned
upside-down again by bonding. This defect is decorated
as the etch pit by standard or diluted Secco’s etching as
described in Example 1 in conjunction with HF
dipping. It is enough to etch until 50 nm of the SOI
layer remaining to etch the defect portion through the
SOI layer selectively by the defect etching such as
Secco etching because the stacking fault penetrates
through the SOI layer. The following HF dipping
etches the BOX through the etch pit to form large
cavity. It helps to count low density of defects in a wide
observation area with low magnification microscope.
8.3.2 Threading Dislocation
8.3.2.1 The etching of the SIMOX sample shown
above in Section 8.3.1.3 (Example 1) is terminated
when the remaining surface silicon layer thickness is
1/3–1/2 of the initial thickness and then dipped in HF as
the same manner as Example 1. In this case the etch
pits include mainly threading dislocations only which
can be counted through optical microscope.
8.3.3 HF Defect
8.3.3.1 Measurement of the microscopic etch pit
density following an HF etch is commonly used to
disclose defects in SOI material. Pitting of surface
5 K. Mitani, H. Aga, and M. Nakano, Jpn. J. Appl. Phys. vol.36, p.
1646 1997.
7 N. Sato, K. Sakaguchi, K. Yamagata, Y. Fujiyama, J. Nakayama,
and T. Yonehara, Jpn. J. Appl. Phys. vol.35, p. 973 (1996).