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SEMI P27-96 © SEMI 1996, 2003 2 3. The range of wave lengt h used for the measurem ent should be specified. Type of the substrate. Surface condition, cleaning method and the refracti ve index of the substrate if availab …

SEMI P27-96 © SEMI 1996, 2003 1

SEMI P27-96 (Reapproved 0703)

PARAMETER CHECKLIST FOR RESIST THICKNESS MEASUREMENT

ON A SUBSTRATE

This checklist was technically approved by the Global Micropatterning Committee and is the direct

responsibility of the Japanese Micropatterning Committee. Current edition approved by the Japanese

Regional Standards Committee on April 28, 2003. Initially available at www.semi.org June 2003; to be

published July 2003. Originally published in 1996.

1 Purpose

1.1 This checklist identifies the parameters for the

thickness measurement of single layer resist on a

substrate. Several methods are known for the thickness

measurement of thin films, among them two methods

are widely used for the thickness measurement of resist

films.

1.2 They are the surface profilemeters which use

mechanical contact method to detect the topology of a

surface, and the light interference method which can be

used only for transparent films.

1.3 The contacting method has more accuracy than

light interference method, but the precision of the

measurement is limited. The light interference method

shows much more precision than the other but the

results depend on measuring conditions.

2 Scope

2.1 This guideline describes on the parameters for the

thickness measurement of single layer resist in

lithography process.

2.2 For example, pre-expose resist thickness

measurement on a bare silicon wafer for the QC of an

optical resist, or the resist thickness measurement of

partially exposed and fully exposed films after

development for the determination of a characteristic

curve of a resist.

NOTICE: This standard does not purport to address

safety issues, if any, associated with its use. It is the

responsibility of the users of this standard to establish

appropriate safety and health practices and determine

the applicability of regulatory or other limitations prior

to use.

3 Referenced Standards

3.1 ASTM Standard

ASTM F804 — Standard Practice for Producing Spin

Coating Resist Curves, 7.4 Thickness Measuring

Instrument

NOTICE: Unless otherwise indicated, all documents

cited shall be the latest published versions.

4 Parameters for Contact Type Measuring

Instruments (Surface Profilometer)

1. Name of the instrument used for the measurement

2. Pressure of the stylus

3. Radius of curvature of the stylus tip

4. Type of substrate

5. The method of making a scratch on the surface of

the resist

6. Temperature and relative humidity of the room

NOTE 1: The stylus pressure should be so adjusted that it

does not leave a visible indented track mark on the resist

surface at × 50 optical microscope magnification.

5 Parameters for Light Interference Thickness

Measurement Apparatus

1. Name of the apparatus used for the measurement

2. Refractive index or Cauchy indexes of the resist

used as the parameter of the measurement

n =

where

A, B, C = Cauchy indexes

n = refractive index

Y = wave length

1 American Society for Testing and Materials, 100 Barr Harbor

Drive, West Conshohocken, Pennsylvania 19428-2959, USA.

Telephone: 610.832.9585, Fax: 610.832.9555, Website:

www.astm.org

SEMI P27-96 © SEMI 1996, 2003 2

3. The range of wave length used for the measurement

should be specified. Type of the substrate. Surface

condition, cleaning method and the refractive index

of the substrate if available.

4. Magnification setting

5. Type of optical filter

6. Temperature and relative humidity of the room

NOTICE: SEMI makes no warranties or

representations as to the suitability of the standards set

forth herein for any particular application. The

determination of the suitability of the standard is solely

the responsibility of the user. Users are cautioned to

refer to manufacturer’s instructions, product labels,

product data sheets, and other relevant literature

respecting any materials mentioned herein. These

standards are subject to change without notice.

The user’s attention is called to the possibility that

compliance with this standard may require use of

copyrighted material or of an invention covered by

patent rights. By publication of this standard, SEMI

takes no position respecting the validity of any patent

rights or copyrights asserted in connection with any

item mentioned in this standard. Users of this standard

are expressly advised that determination of any such

patent rights or copyrights, and the risk of infringement

of such rights, are entirely their own responsibility.

International), 3081 Zanker Road, San Jose, CA 95134. Reproduction o

the contents in whole or in part is forbidden without express written

consent of SEMI.

SEMI P28-96 © SEMI 19961

SEMI P28-96

SPECIFICATION FOR OVERLAY-METROLOGY TEST PATTERNS FOR

INTEGRATED-CIRCUIT MANUFACTURE

1 Purpose

1.1 This document defines several standard overlay-

metrology patterns that are used by metrology

equipment users to evaluate and test micropatterning

equipment and processes in integrated circuit (IC)

manufacturing. These overlay cells may be placed by

optional patterning methods onto substrates during the

manufacturing process. Usage of the standard overlay

patterns is an attempt to provide consistent

industrywide use of automated metrology equipment.

2 Scope

2.1 This specification defines general designs that

describe the shape, size, design rules, and placement

considerations (where appropriate) of several basic

patterns for overlay metrology. These standard test

patterns can be used for optical, scanning electron

beam, and other types of metrology.

3 Limitations

3.1 The patterns described in this document represent

the first pass at an industrywide commonality for the

purpose of compatibility among various types of

automated metrology equipment. It is not suggested,

however, that these test patterns are a full complement

or are optimal for all overlay-metrology applications.

This document does not attempt to specify how the

patterns are to be imaged or measured on the substrate.

4 Referenced Documents

4.1 SEMI Documents

SEMI International Standards Handbook — Section E:

Compilation of Terms

SEMI P6 — Specification for Registration Marks for

Photomasks

SEMI P18 — Specification for Overlay Capabilities of

Wafer Steppers

SEMI P19 — Specification for Metrology Pattern Cells

for Integrated Circuit Manufacture

4.2 ASTM Standard

F 127-84 — Definition of Terms Relating to

Photomasking Technology for Microelectronics

1 American Society for Testing and Materials, 100 Barr Harbor

Drive, West Conshohoken, PA 19428-2959

5 Terminology

5.1 centerline — a reference line that is equidistant

from opposite edges of a feature.

5.2 feature — areas within a singl e continuous

boundary (for example, an aggregate image) that have

any physical property that is distinct from the

background area outside the feature (e.g., the simplest

element of a test pattern, such as a single line or bar).

Some physical properties that may distinguish the

feature are the refractive index, surface roughness, etc.

5.3 feature dimension — the dime nsion of interest;

such as, the side of a box , bar width, and/or length.

5.4 overlay (micropatterning)

A vector quantity defined at every point on the wafer.

It is the difference,

O , between the vector position, 1P ,

of a substrate geometry, and the vector position of the

corresponding point, 2P , in an overlaying pattern,

which may consist of photoresist. [SEMI P18-92]

NOTE: All overlay test patterns are designed to provide

both X and Y components of the vector overlay.

5.5

pattern, overlay test — a grou p of features for

overlay metrology.

5.6

pitch — the distance between a point on an image

and the corresponding point on the corresponding

image in an adjacent functional pattern.

5.7

substrate (materials) — in semiconductor

technology, a wafer that is the basis for subsequent

processing operations in the fabrication of

semiconductor devices or circuits. [ASTM F 1241-89]

NOTE: The meaning of substrate is not limited to

wafers.

6 General Specification

6.1 Introduction

6.1.1 This specification describes th e overlay test

patterns that are illustrated in the figures at the end of

this document. The imaging means by which these test

patterns are defined on the substrate may be selected by

the user (see 6.2.1).

6.1.2

Characteristics of the overlay patterns, such as

materials, topography, polarity, and method of pattern

transfer will be defined by the user unless otherwise

noted. When reporting measurements extracted from

these overlay test patterns, the user should state the