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SEMI M59-0305 © SEMI 2005 1 SEMI M59-0305 TERMINOLOGY FOR SI LICON TECHNOLOGY This standard was technically approved by the Global Silicon Wafer Committ ee and is the d irect responsibility of the North American Silicon …

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SEMI M58-0704 © SEMI 2004 12
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SEMI M59-0305 © SEMI 2005 1
SEMI M59-0305
TERMINOLOGY FOR SILICON TECHNOLOGY
This standard was technically approved by the Global Silicon Wafer Committee and is the direct
responsibility of the North American Silicon Wafer Committee. Current edition approved by the North
American Regional Standards Committee on December 10, 2004. Initially available at www.semi.org
February 2005; to be published March 2005.
NOTICE: This document replaces SEMI MF1241.
1 Purpose
1.1 Silicon technology underlies the integrated circuit and device industry. To promote common understanding and
correct communication between suppliers and customers and others in the field, terms used in this field should be
defined.
1.2 This terminology document covers definitions of terms used in relation to semiconductor silicon crystals and
wafers.
2 Scope
2.1 This terminology covers terms describing attributes of silicon wafers as specified in SEMI M1 and other SEMI
standards as outlined in SEMI M1. These attributes include electrical, structural, chemical, and dimensional
characteristics of polished and other types of silicon wafers as well as surface defects and contamination.
2.2 This terminology is applicable for use in connection with research, development, process control, inspection,
and procurement of silicon material.
2.3 Almost all of the terms for which definitions are listed are nouns. Unless the part of speech is given for any
particular term, it can be assumed that the term is a noun.
NOTICE: This standard does not purport to address safety issues, if any, associated with its use. It is the
responsibility of the user of this standard to establish appropriate safety and health practices and determine the
applicability of regulatory or other limitations prior to use.
3 Referenced Standards
3.1 SEMI Standard
SEMI M1 — Specifications for Polished Monocrystalline Silicon Wafers
3.2 ISO Standard
1
ISO 4287/1 — Surface Roughness – Terminology – Part 1: Surface and its Parameters
3.3 ANSI Standard
2
ANSI/ASME B46.1 — Surface Texture (Surface Roughness, Waviness, and Lay)
NOTICE: Unless otherwise indicated, all documents cited shall be the latest published versions.
4 Abbreviations and Acronyms
4.1 AAS — atomic absorption spectroscopy, a method for analyzing for impurities.
4.2 AFM — atomic force microscope, an instrument for measuring microroughness.
4.3 A/N — alphanumeric.
4.4 ANSI — American National Standards Institute
2
, the American member of ISO.
1 International Organization for Standardization, ISO Central Secretariat, 1, rue de Varembé, Case postale 56, CH-1211 Geneva 20, Switzerland.
Telephone: 41.22.749.01.11; Fax: 41.22.733.34.30 Website:
www.iso.ch
.
2 American National Standards Institute, New York Office: 25 West 43rd Street, New York, NY 10036, USA. Telephone: 212.642.4900; Fax:
212.398.0023 Website:
www.ansi.org
.
SEMI M59-0305 © SEMI 2005 2
4.5 As — arsenic, an n-type dopant in silicon.
4.6 ASTM — ASTM International,
3
previously the American Society for Testing and Materials, an American
organization that developed standards for silicon technology between 1964 and 2002; these standards, though
developed primarily by American experts have been used world-wide.
4.7 B — boron, a p-type dopant in silicon.
4.8 BMD — bulk micro defect.
4.9 BRDF — bi-directional reflectance distribution function.
4.10 CCW — counterclockwise, rotation in the direction opposite to that of the hands of a clock.
4.11 COP — crystal originated pit, a small pit or plurality of small pits introduced during crystal growth that act as
an LLS.
4.12 CRM — certified reference material.
4.13 CVD — chemical vapor deposition, a method for producing epitaxial films.
4.14 CW — clockwise, rotation in the direction of the hands of a clock.
4.15 Cz — Czochralski, a type of crystal growth.
4.16 DDS — difference data set, the difference between the reference data set and the sample data set.
4.17 DI — deionized, generally referred to in connection with electronic grade water.
4.18 DIN — Deutches Institut für Normung,
4
the German national standards organization, which has developed
numerous standards for silicon during the last three decades.
4.19 FPD — focal plane deviation.
4.20 FQA — fixed quality area of a silicon wafer.
4.21 FZ — float zone, a type of crystal growth.
4.22 GBIR — the most common type of global flatness, see Appendix 1 of SEMI M1 for other types of global
flatness.
4.23 GFA — gas fusion analysis, a method for measuring total oxygen in silicon.
4.24 GRR — grand round robin, the international interlaboratory experiment that established IOC-88.
4.25 IC — integrated circuit.
4.26 ICP/MS — inductively coupled plasma mass spectroscopy, a method for analysis of impurities, not yet
standardized.
4.27 IOC-88 — international oxygen conversion factor-1988, the currently universally adopted conversion factor
between the infrared absorption peak and the interstitial oxygen content in silicon.
4.28 ID — identification, referring to the laser mark on silicon and other semiconductor wafers.
4.29 ISO — International Organization for Standardization,
1
a body recognized by the World Trade Organization as
a developer of international standards, including a few applicable to silicon technology.
4.30 JEIDA — Japan Electronic Industry Development Association, now JEITA
4.31 JEITA — Japanese Electronic and Information Technology Industries Association,
5
successor to JEIDA upon
the merging of JEIDA and the Electronic Industries Association of Japan (EIAJ), which has a committee that
develops standards for silicon materials and technology.
3 ASTM International, 100 Barr Harbor Drive, West Conshohocken, Pennsylvania 19428-2959, USA. Telephone: 610.832.9585, Fax:
610.832.9555 Website:
www.astm.org.
4 Deutches Institut für Normung e.V., Beuth Verlag GmbH, Burggrafenstrasse 4-10, D 10787 Berlin, Germany, website: www.din.de.
5 Japan Electronics and Information Technology Industries Association, 3rd floor, Mitsui Sumitomo Kaijo Bldg. Annex, 11, Kanda-Surugadai
3-chome, Chiyoda-ku, Tokyo 101-0062, Japan, Website:
www.jeita.or.jp
.