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SEMI MF928-0305 © SEMI 2005 1 SEMI MF928-0305 TEST METHODS FO R EDGE CONTOUR OF CIRCULAR SEMICONDUCTOR WAFERS AND RIGID DISK SUBSTRATES These test methods were techni cally approved by the Global Silicon W a fer Comm itt…

SEMI MF674-0705 © SEMI 2003, 2005 5

finish with the microscope. Compare the finish with the appropriate photograph of Figure 2, which shows results

obtainable with different size diamond in the range specified for two types of motion during polishing. Repolish

lightly if the finish appears to be significantly coarser than that shown in the appropriate photograph. Use dry air or

nitrogen to blow the specimen surface dry prior to carrying out any spreading resistance measurements.

NOTE 12: Clean the polishing plate regularly to remove coarse polishing residue or air-borne contaminants. This cleaning can

be done with a lint–free cloth or paper wipe and the same solvent used to clean polishing residue from the specimen. Inspect the

plate when clean. If it shows signs of scratching, burnish marks, or areas where the lapped finish has been polished smooth, relap

the plate then clean thoroughly to remove lapping debris and broken-in on scrap samples (see Note 13).

NOTE 13: A newly-frosted glass plate may not yield optimum results. Such a plate can be improved by preparing a number of

samples of scrap silicon before beveling the test specimen of interest. The best indicator of frosted glass plate condition is the

quality and uniformity of surface damage on the finished bevel.

a. 0.1

m Diamond, b. 0.1 m Diamond, c. 0.5 m Diamond,

Reciprocating Motion Figure-of-Eight Motion Reciprocating Motion

Figure 2

Surface Texture of Silicon Specimens Bevel-Sectioned with Diamond Against Ground-Glass Surface

13 Keywords

13.1 beveling; diamond polishing; resistivity; resistivity variations; sample preparation; semiconductor; silicon;

spreading resistance; spreading resistance probe (SRP)

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SEMI MF928-0305 © SEMI 2005 1

SEMI MF928-0305

TEST METHODS FOR EDGE CONTOUR OF CIRCULAR

SEMICONDUCTOR WAFERS AND RIGID DISK SUBSTRATES

These test methods were technically approved by the Global Silicon Wafer Committee and are the direct

responsibility of the North American Silicon Wafer Committee. Current edition approved for publication by

the North American Regional Standards Committee on December 10, 2004 Initially available at

www.semi.org January 2005; to be published March 2005. Original edition published by ASTM

International as ASTM F 928-85. Last previous edition SEMI MF928-02.

1 Purpose

1.1 The edges of circular wafers of electronic materials are frequently required to be shaped after cutting the wafers

from the ingot. Contouring the wafer edge reduces the incidence of chipping and minimizes epitaxial edge crown

and photoresist edge bead during subsequent processing of the wafer. Similarly, edges of rigid disk substrates are

frequently edge shaped.

1.2 The test methods described here provide means to determine that the wafer edge contour is appropriate to meet

specifications, such as SEMI M1 or SEMI M9, which are intended to provide wafers avoiding the difficulties

enumerated above.

2 Scope

2.1 These test methods provide means for examining the edge contour of circular wafers of silicon, gallium

arsenide, and other electronic materials, and determining fit to limits of contour specified by a template that defines

a permitted zone through which the contour must pass. Principal application of such a template is intended for, but

not limited to, wafers that have been deliberately edge shaped.

NOTE 1: DIN 50441/2 is equivalent to Method B of this standard. It is the responsibility of DIN Committee NMP 221. DIN

50441/2, Measurement of the Geometric Dimensions of Semiconductor Slices; Testing of Edge Rounding, is available from

Beuth Verlag GmbH, Burggrafenstrasse 6, 10787 Berlin, Germany, Telephone: 49.30.2601-0, Fax: 49.30.2601.1263, Website:

www.beuth.de.

2.2 Two test methods are described.

2.2.1 Method A is destructive and is limited to inspection of discrete points on the periphery, including flats. The

contour of deliberately edge-shaped wafers may not be uniform around the entire periphery, and thus the discrete

location(s) may or may not be representative of the entire periphery.

2.2.2 Method A is recommended for examining the edge profile of flatted regions of the wafer.

2.2.3 Method A is best suited for referee purposes.

2.3 Method B is nondestructive and suitable for inspection of all points on the wafer periphery except flats.

2.3.1 Method B is appropriate for routine process monitoring such as alignment of wafer edge grinders, routine

quality control and incoming/outgoing inspection purposes. In view of the uncertainty of precisely locating the

intersection of the contour and the wafer surface when carrying out Method B, use of this method for commercial

transactions is not recommended unless the parties to the test establish the degree of correlation that can be obtained.

2.3.2 Method B may also be applied to the examination of the edge contour of the outer periphery of substrates for

rigid disks used for magnetic storage of data; metallic rigid disk substrates cannot conveniently be cleaved.

NOTE 2: Reference to wafers in the remainder of this standard shall be interpreted to include substrates for rigid disks unless the

phrase “of electronic materials” is also included in the context.

2.4 The values stated in SI units are to be regarded as the standard. The values given in parentheses are for

information only.

NOTICE: This standard does not purport to address safety issues, if any, associated with its use. It is the

responsibility of the user of this standard to establish appropriate safety and health guides and determine the

applicability of regulatory or other limitations prior to use.

SEMI MF928-0305 © SEMI 2005 2

3 Limitations

3.1 In Method B, the profile of the parallel surfaces of the wafer may not be sharply focused at distances exceeding

approximately 0.5 mm (0.020 in.) from the extreme wafer edge toward the wafer center. This uncertainty in the

wafer surface location may cause inaccuracy in positioning the wafer with respect to template lines. It may also

make it difficult to determine whether the wafer edge profile lies within the permitted zone at point B of the

template (see Figure 1). These difficulties can be overcome by aligning a straight edge to the wafer surface by direct

contact, observing the shadow extension in the sharply focused region, and extrapolating the straight line edge of the

template reference. In applying this technique, exercise care to avoid damaging or contaminating the wafer surface.

3.1.1 This limitation renders Method B unsuitable for determining the distance between the front and back wafer

surfaces. The edge contours near the front and back surfaces of the wafer must be inspected separately.

3.2 In Method B, attempting to view the complete wafer periphery, except flats, through wafer rotation may

necessitate frequent focus adjustment due to variations in wafer roundness and fixturing precision, including wafer

centering.

3.3 By either test method, any foreign material such as large particles or high spots on the wafer surface in the light

path will present a false edge contour by masking the true contour shape.

3.4 It is not always feasible to provide a uniform radius or bevel to the edges of wafers because silicon, gallium

arsenide, and many other electronic materials as well as glass disk substrates are both hard and brittle. Wear of

grinding tools, process variations, and the presence of flats on the circumference of wafers cause practical contours

to have varying shapes. For this reason, templates are used that define an allowed range.

3.5 If a television system is used, the user is cautioned that distortions in the horizontal and vertical deflections may

occur (see ¶9.2).

4 Referenced Standards

4.1 SEMI Standards

SEMI M1 — Specifications for Polished Monocrystalline Silicon Wafers

SEMI M9 — Specifications for Polished Monocrystalline Gallium Arsenide Slices

4.2 ANSI Standard

ANSI/ASQC Z1.4 — Sampling Procedures and Tables for Inspection by Attributes

NOTICE: Unless otherwise indicated, all documents cited shall be the latest published versions.

5 Summary of Test Methods

5.1 Both test methods employ optical means to project a shadow of the edge contour at substantial magnification on

a screen.

5.1.1 In applying Method A (destructive) the sample wafer is cleaved or broken along a diameter. A sharply

focused image of the cross section of the wafer is obtained over a sufficiently large region near the edge with the aid

of an optical comparator or projection microscope.

5.1.2 In Method B (nondestructive) the unbroken wafer is back lighted with collimated (parallel) light such that a

sharply defined shadow of the wafer edge is projected on a screen. In this test method the wafer is not altered in any

way.

5.2 By either test method, the contour of the wafer edge profile image is compared to a template that has been

mounted or projected on the screen. The template defines a permitted zone through which the edge contour must

pass.

1 American National Standards Institute, New York Office: 25 West 43rd Street, New York, NY 10036, USA. Telephone: 212.642.4900, Fax:

212.398.0023, Website: