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SEMI E78-1102 © SEMI 1998, 2002 12 “X” indicates that the equipment passes ESD sim ulator testing at this level. NOTE 1: This level is subject to negotiation and has to be specified in the dedicated e quipment specificat…

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SEMI E78-1102 © SEMI 1998, 2002 11
A1-2.2.1.8 Using higher values of N/A in Equation 13
will increase the acceptable values of ct and max t.
Accepting higher values of c will reduce max t. The
guideline table provides an order of magnitude
assessment of the degree of electric field and charge
control needed in specific operations. Minimum field
and minimum particle charge are always the goal but
usually not practically achievable. This guideline table
provides background estimates of envelopes for
acceptable operation in electrically charged
environments.
A1-2.2.2 The following simplified table is offered as
an alternative to Table A1-2 based on the following
assumptions:
1. Calculations made for Federal Standard 209E Class
1 (c ≤ 0.00124 particles/cm
3
).
2. The value of the electrostatic field is referenced at a
distance of one wafer radius from the wafer. While
electrostatic field measurements can certainly be
made at this distance, they are typically made at 2.5
cm (1 inch) with common instrumentation. This is
described in SEMI E43. Measurements made at this
smaller distance will be proportionally higher, but
under varying measurement conditions, it is difficult
to determine a precise relationship between electric
field and measurement distance. To provide a
suitable safety factor, assume a linear relationship,
rather than one proportional to the square of the
distance. For example, with a 200 mm wafer, 4000
Volts/cm at 2.5 cm would result in 1000 Volts/cm at
10 cm, rather than 250 Volts/cm.
3. The proportionality effect of q/q
Fuchs
has been
explained, as has the difficulty in actually
determining any value for it. For simplicity, the
table includes only the q = q
Fuchs
condition.
4. N/A = 0.016 defects/cm
2
as specified for 0.25 µm
technology in the National Technology Roadmap
for Semiconductors.
Table A1-2.1 Alternative to Allowed Exposure Times
in an ISO Class 1 Environment
EV/cm at 2.5
cm
N
/A defects
per cm
2
v
elect
cm/sec
ct
sec/cm
3
max t in
Class 1 sec
4000 0.016 0.21 0.0762 61
400 0.016 0.021 0.762 610
200 0.016 0.0105 1.524 1220
100 0.016 0.00525 3.048 2440
A1-2.3 Guide Recommendations for Equipment
Malfunctions
A1-2.3.1 Equipment Survey — Most semiconductor
production equipment should comply with the ESD
immunity requirements of the European Economic
Community (EEC). The testing mandated by the EEC
uses the test methods and ESD immunity levels
specified in IEC 6100-4-2. A recent survey of 262
semiconductor equipment suppliers revealed that 71%
were compliant with the EEC requirements. There is an
expectation that all equipment to be used in future 300
mm wafer fabrication will meet or exceed the ESD
immunity requirements of IEC 6100-4-2.
A1-2.3.1.1 To test for compliance, measurements were
made with the ESD simulator described by IEC 6100-4-
2 on a representative sample of semiconductor
equipment. The results were as follows:
ESD Simulator Testing Direct Contact Discharge
Equipment
Test
Voltage
Level 1
(2 kV)
Test
Voltage
Level 2
(4 kV)
Test
Voltage
Level 3
(6 kV)
Test
Voltage
Level 4
(8 kV)
Test
Voltage
Level X
(NOTE 1)
A X
B X
C X
D X
E X
F X
G X
H X
I X
J X
ESD Simulator TestingAir Discharge at 10 cm
Equipment Test
Voltage
Level 1
(2 kV)
Test
Voltage
Level 2
(4 kV)
Test
Voltage
Level 3
(8 kV)
Test
Voltage
Level 4
(15 kV)
Test
Voltage
Level X
(NOTE 1)
A X
B X
C X
D X
E X
F X
G X
H X
I X
J X
SEMI E78-1102 © SEMI 1998, 2002 12
“X” indicates that the equipment passes ESD simulator testing at this
level.
NOTE 1: This level is subject to negotiation and has to be
specified in the dedicated equipment specification. If higher
voltages than those shown are specified, special test
equipment may be needed.
A1-2.3.2 Static Audit — While equipment may meet
the ESD immunity levels specified in IEC 6100-4-2, it
should be remembered that static charge levels in
manufacturing environments may be substantially
higher. Direct measurements of static charge are
difficult, and the presence of a charge does not always
imply that an ESD event causing an equipment
malfunction will occur. Some information may be
gained by using a fieldmeter to measure the
electrostatic field created by the surface charge.
Instruments known as EMI locators may also be used in
some cases to determine if ESD-related EMI is
occurring. Some representative measurements of
electric fields from objects in various areas of a
semiconductor wafer fab are as follows:
• Wet Etch — 0.1 kV/inch to 30 kV/inch
• Planarization — 0.1 kV/inch to 20 kV/inch
• Lithography — 0.1 kV/inch to 20 kV/inch
• Dry Etch — 0.1 kV/inch to 15 kV/inch
• Thin Film — 0.1 kV/inch to 15 kV/inch
• Diffusion — 0.1 kV/inch to 30 kV/inch
• Implant — 0.1 kV/inch to 15 kV/inch
A1-2.3.2.1 A knowledge of object capacitance and
other physical properties is needed to determine if any
of the above measurements indicate an equipment
hazard due to ESD events. However, the range of the
measurements strongly indicate that such ESD events
can occur. The examples in Related Information R1-3.3
support this conclusion.
A1-2.3.3 Guide Recommendations — Based on the
static audits and equipment test data, there appears to be
a wide range of static immunity in equipment as well as
in the static charge levels in work environments. As
stated previously, it is difficult to establish a direct
correlation between ESD events and fieldmeter
measurements made on products, carriers, or any other
objects in the work environment. The following
sensitivity levels are defined with recommended test
levels for each.
A1-2.3.3.1 Level 4 — Field measurements of static
charge at input/exit ports are expected to exceed 10
kV/inch. Equipment should pass ESD simulator testing
at 8 kV direct contact discharge, 18 kV air discharge.
Guide recommendation (Section 12.5) - 1200
nanocoulombs (8 kV × 150 picofarads).
A1-2.3.3.2 Level 3 — Field measurements of static
charge at input/exit ports are expected to exceed 4
kV/inch, but are less than 10 kV/inch. Equipment
should pass ESD simulator testing at 4 kV direct
contact discharge, 8 kV air discharge. Guide
recommendation (Section 12.5) - 600 nanocoulombs (4
kV × 150 picofarads).
A1-2.3.3.3 Level 2 — Field measurements of static
charge at input/exit ports are expected to exceed 500
V/inch, but are less than 4 kV/inch. Equipment should
pass ESD simulator testing at 2 kV direct contact
discharge, 4 kV air discharge. Guide recommendation
(Section 12.5) - 300 nanocoulombs (2 kV × 150
picofarads).
A1-2.3.3.4 Level 1 — Field measurements of static
charge at input/exit ports are expected to exceed zero,
but are less than 500 V/inch. Equipment should pass
ESD simulator testing at 1 kV direct contact, 2 kV air
discharge. Guide recommendation (Section 12.5) - 150
nanocoulombs (1 kV × 150 picofarads).
NOTICE: SEMI makes no warranties or
representations as to the suitability of the standards set
forth herein for any particular application. The
determination of the suitability of the standard is solely
the responsibility of the user. Users are cautioned to
refer to manufacturer’s instructions, product labels,
product data sheets, and other relevant literature
respecting any materials mentioned herein. These
standards are subject to change without notice.
The user’s attention is called to the possibility that
compliance with this standard may require use of
copyrighted material or of an invention covered by
patent rights. By publication of this standard, SEMI
takes no position respecting the validity of any patent
rights or copyrights asserted in connection with any
item mentioned in this standard. Users of this standard
are expressly advised that determination of any such
patent rights or copyrights, and the risk of infringement
of such rights, are entirely their own responsibility.
SEMI E78-1102 © SEMI 1998, 2002 13
RELATED INFORMATION 1
STATIC CHARGE PROBLEMS
NOTE: The material contained in this related information is not an official part of SEMI E78 and is not intended to modify or
supersede the guide in any way. These notes are provided as a source of information to aid in the application of the guide, and are
to be considered reference material. Determination of the suitability of the material is solely the responsibility of the user.
R1-1 ESD Damage
Contributed by Leo G. Henry, Ph.D., Advanced Micro
Devices, EOS/ESD/LU/EMC Department, Sunnyvale,
CA 94538, leogesd@pacbell.net.
R1-1.1 Introduction — ESD damage to devices occurs
when they come into contact with personnel and
equipment. Either may store a residual charge large
enough to destroy the device if a discharge occurs. In
the semiconductor industry, it has been established that
a significant proportion of customer field returns are
attributed to damage resulting from ESD.
R1-1.2 Description of ESD Damage Mechanisms —
ESD failures are the result of either a current-induced
phenomenon or a charge-induced phenomenon, and the
damage can either be junction, contact, dielectric or
oxide related. The apparent similarity in current-
induced damage resulting from ESD due to human
body model discharges (HBM) or machine model
discharges (MM) results from the thermal nature of
both of these process. The HBM and MM damages
result when the temperature (joule heating) of the
region dissipating the ESD pulse energy reaches a
critical value and melting occurs.
R1-1.2.1 Charge-induced phenomena are predicted by
the charged device model (CDM). For CDM type
discharges, oxide punch through occurs when the ESD
voltage applied across the oxide creates a high enough
field to break down the oxide. Excessive current flow
results, causing an oxide short, but there is no heat
transfer (adiabatic process).
R1-1.2.2 It should be noted here that the time duration
for typical ESD events from charged objects and
personnel ranges from 10 to 100 nanoseconds, while
CDM type events occur in less than 1 nanosecond.
R1-1.3 Device Testing Models
R1-1.3.1 Human Body Model (HBM) — The Human
Body Model is the oldest and the most widely used of
the three ESD models. The model attempts to replicate
the discharge from a real human when the latter touches
a device that is at a lower potential. The human
capacitance and resistance have been ideally chosen to
be 100 picofarads and 1500 ohms respectively. The
values were chosen after measurements were made on
humans in varying positions with respect to their
surroundings. The resulting discharge waveform has a
double exponential shape with risetime range of 2–10
nsec and a decay constant (1/e position) of 150 ± 20
nsecs. The typical peak currents range from 0.67 Amps
at 1000 volts to 2.67 Amps at 4000 volts.
R1-1.3.2 Machine Model (MM) — The Machine
Model is described by Electronic Industries Association
of Japan (EIAJ) as a worst case HBM. The model
attempts to replicate the discharge from a metallic arm
of an automatic handler coming into contact with the
metallic leads of a semiconductor device which is at a
lower potential. A capacitance of 200 picofarads and
ideally zero resistance produces a sinusoidal decaying
waveform with an effective pulse duration of 200 nsec.
The typical peak currents range from 1.75 Amps at 100
volts to 14.0 Amps at 800 volts. Note that MM failures
occur at 5–10 times lower voltage than HBM.
R1-1.3.3 Charged Device Model (CDM) — The
Charged Device Model in its purest form is actually a
field induced model because the device is actually part
of model. This model attempts to describe a device
which itself becomes charged due to an external field,
or due to triboelectric charging of the device surfaces.
During discharge, the parasitics (capacitance,
inductance and impedance) in the device play a
significant role in the resulting failure. The discharge
pulse is a sinusoidal waveform with an extremely fast
risetime of less than 500 picoseconds. The waveform
decays rapidly with a total pulse duration of less than 5
nano-seconds. The peak currents range from 2.0 Amps
at 250 volts charging voltage, to 18.0 Amps at 2000
volts charging voltage.
R1-1.3.4 Correlation Between Models — There is
much debate on whether or not there is any type of
correlation between HBM and MM. While some
companies report a correlation of roughly 10:1 between
the two models, other companies have seen anywhere
from 5–20:1 differences in passing voltages between
the two models. There is also no established voltage
correlation between CDM damage and HBM or MM
ESD events. In equipment, ESD damage events will be
related to the MM or CDM types of ESD. Users will
need to determine the type of ESD hazard to their
devices and choose the test method accordingly.
R1-1.4 ESD Laboratory Simulation Testing
R1-1.4.1 Description of Test Methods — Test
procedures discussed here for ESD simulation conform