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SEMI M18-0704 © SEMI 1990, 2004 1 SEMI M18-0704 FORMAT FOR SILICON WAFER SP ECIFICATION FORM FOR ORDER ENTRY This format was technically approved by the Glo bal Silicon Wafer Committee and is the direct responsibility of…

SEMI M17-0704 © SEMI 1990, 2004 5

NOTICE: SEMI makes no warranties or

representations as to the suitability of the standards set

forth herein for any particular application. The

determination of the suitability of the standard is solely

the responsibility of the user. Users are cautioned to

refer to manufacturer’s instructions, product labels,

product data sheets, and other relevant literature

respecting any materials mentioned herein. These

standards are subject to change without notice.

The user’s attention is called to the possibility that

compliance with this standard may require use of

copyrighted material or of an invention covered by

patent rights. By publication of this standard, SEMI

takes no position respecting the validity of any patent

rights or copyrights asserted in connection with any

item mentioned in this standard. Users of this standard

are expressly advised that determination of any such

patent rights or copyrights, and the risk of infringement

of such rights, are entirely their own responsibility.

International), 3081 Zanker Road, San Jose, CA 95134. Reproduction o

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consent of SEMI.

SEMI M18-0704 © SEMI 1990, 2004 1

SEMI M18-0704

FORMAT FOR SILICON WAFER SPECIFICATION FORM FOR ORDER

ENTRY

This format was technically approved by the Global Silicon Wafer Committee and is the direct responsibility

of the Japanese Silicon Wafer Committee. Current edition approved by the Japanese Regional Standards

Committee on April 30, 2004. Initially available at www.semi.org June 2004; to be published July 2004.

Originally published in 1990; last published March 2004.

1 Purpose

1.1 This format provides a standard form for specifying

several classifications of silicon wafers, as follows:

1.1.1 Polished Silicon Wafers.

1.1.2 Epitaxial Silicon Wafers.

1.1.3 Epitaxial Silicon Wafers with Buried Layer.

1.1.4 Annealed Silicon Wafer.

1.1.5 SOI Wafers for CMOS Applications.

1.2 This format also lists the Electronic Data

Interchange (EDI) codes used in SEMI T6 to identify

the type of data being reported in the EDI message.

2 Scope

2.1 The form is designed to be used in conjunction

with other SEMI specifications where details of the

dimensional, physical, electrical, and chemical

properties are defined or specified. However, the form

includes many items that are not currently included in

the SEMI specifications. Also, many items are not now

commonly specified, but may find increased

importance in the future. The intention is to provide for

flexibility and expansion of the technology.

2.2 This format provides for specifying and ordering

silicon wafers with varying levels of complexity. The

minimum level of completeness is shown in each case,

with additional options included to allow for

customization of the wafer to the specific processing

requirements of the user. If a particular item is not of

interest, no entry is required. The only required entries

are those marked as such for the purpose of minimal

specification (diameter, orientation, dopant, resistivity,

etc.).

2.3 Values for many items are listed either in the

polished silicon wafer standards in SEMI M1 or in the

defect limits tables in SEMI M1, SEMI M2, or SEMI

M11. If these standard specifications are sufficient for

defining the wafers, only a single entry is required in

each section of the form.

2.4 This format also lists the codes required by SEMI

T6 to identify the parameter being reported in the EDI

message. Where necessary, secondary characteristics

or identifier codes are listed within a generalized

characteristic.

2.5 For referee purposes, U.S. Customary units shall be

used for wafers of 2- and 3-inch diameters, and SI

(System International, commonly called metric) units

for 100 mm and larger diameter wafers.

NOTICE: This standard does not purport to address

safety issues, if any, associated with its use. It is the

responsibility of the users of this standard to establish

appropriate safety and health practices and determine

the applicability of regulatory or other limitations prior

to use.

3 Referenced Standards

3.1 SEMI Standards

SEMI M1 — Specifications for Polished

Monocrystalline Silicon Wafers

SEMI M2 — Specifications for Silicon Epitaxial

Wafers for Discrete Device Applications

SEMI M11 — Specifications for Silicon Epitaxial

Wafers for Integrated Circuit (IC) Applications

SEMI M12 — Specification for Serial Alphanumeric

Marking of the Front Surface of Wafers

SEMI M13 — Specifications for Alphanumeric

Marking of Silicon Wafers

SEMI M20 — Specification for Establishing a Wafer

Coordinate System

SEMI M33 — Test Method for the Determination of

Residual Surface Contamination on Silicon Wafers by

Means of Total Reflection X-Ray Fluorescence

Spectroscopy (TXRF)

SEMI M35 — Guide for Developing Specifications for

Silicon Wafer Surface Features Detected by Automated

Inspection

SEMI M47 — Specification for Silicon-on-insulator

(SOI) Wafers for CMOS LSI Applications

SEMI MF26 — Standard Test Methods for

Determining the Orientation of a Semiconductive

Single Crystal

SEMI M18-0704 © SEMI 1990, 2004 2

SEMI MF28 — Test Method for Minority-Carrier

Lifetime in Bulk Germanium and Silicon by

Measurement of Photoconductive Decay

SEMI MF42 — Standard Test Methods for

Conductivity Type of Extrinsic Semiconducting

Materials

SEMI MF81 — Method for Measuring Radial

Resistivity Variation on Silicon Wafers

SEMI MF84 — Standard Test Method for Measuring

Resistivity of Silicon Wafers with an In-Line Four-

Probe Array

SEMI MF95 — Test Method for Thickness of Lightly

Doped Silcon Epitaxial Layers on Heavily Doped

Silicon Substrates Using an Infrared Dispersive

Spectrophotometer

SEMI MF110 — Test Metod for Thickness of Epitaxial

or Diffused Layers in Silicon by the Angle Lapping and

Staining Technique

SEMI MF154 — Standard Practices and Nomenclature

for Identification of Structures and Contaminants Seen

on Specular Silicon Surfaces

SEMI MF374 — Test Method for Sheet Resistance of

Silicon Epitaxial, Diffused, Polysilicon, and Ion-

implanted Layers Using and In-Line Four-Point Probe

SEMI MF391 — Standard Test Methods for Minority-

Carrier Diffusion Length in Extrinsic Semiconductors

by Measurement of Steady-State Surface Photovoltage

SEMI MF398 — Test Method for Majority Carrier

Concentration in Semiconductors by Measurement of

Wave Number or Wavelength of the Plasma Resonance

Minimum.

SEMI MF523 — Standard Practice for Unaided Visual

Inspection of Polished Silicon Wafer Surface

SEMI MF525 — Test Method Measuring Resistivity of

Silicon Wafers Using a Spreading Resistance Probe

SEMI MF533 — Standard Test Method for Thickness

and Thickness of Variation of Silicon Wafers

SEMI MF534 — Standard Test Method for Bow of

Silicon Wafers

SEMI MF657 — Standard Test Method for Measuring

Warp and Total Thickness Variation on Silicon Wafers

by Noncontact Scanning

SEMI MF671 — Standard Test Method for Measuring

Flat Length on Wafers of Silicon and Other Electronic

Material

SEMI MF672 — Test Method for Measuring

Resistivity Profiles Perpendicular to the Surface of a

Silicon Wafer Using a Spreading Resistance Probe

SEMI MF673 — Standard Test Methods for Measuring

Resistivity of Semiconductor Slices or Sheet Resistance

of Semiconductor Films with a Noncontact Eddy-

Current Gage

SEMI MF723 — Practice for Conversion Between

Resisitivity and Dopant Density for Boron-Doped,

Phosphorus-Doped, and Arsenic-Doped Silicon.

SEMI MF847 — Standard Test Methods for Measuring

Crystallographic Orientation of Flats on Single Crystal

Silicon Wafers by X-Ray Techniques

SEMI MF928 — Standard Test Methods for Edge

Contour of Circular Semiconductor Wafers and Rigid

Disk Substrates

SEMI MF951 — Test Method for Radial Interstitial

Oxygen Variation in Silicon Wafers

SEMI MF978 — Standard Test Method for

Characterizing Semiconductor Deep Levels by

Transient Capacitance Techniques

SEMI MF1049 — Standard Practice for Shallow Pit

Detection on Silicon Wafers

SEMI MF1152 — Standard Test Method for

Dimensions of Notches on Silicon Wafers

SEMI MF1188 — Standard Test Method for Interstitial

Atomic Oxygen Content of Silicon by Infrared

Absorption

SEMI MF1239 — Standard Test Methods for Oxygen

Precipitation Characterization of Silicon Wafers by

Measurement of Interstitial Oxygen Reduction

SEMI MF1241 — Standard Terminology of Silicon

Technology

SEMI MF1366 — Test Method for Measuring Oxygen

Concentration in Heavily Doped Silicon Substrates by

Secondary Ion Mass Spectroscopy

SEMI MF1388 — Test Method for Generation Lifetime

and Generation Velocity of Silicon Material by

Capacitance-Time Measurements of Metal-Oxide-

Silicon (MOS) Capacitors

SEMI MF1390 — Standard Test Method for Measuring

Warp on Silicon Wafers by Automated Noncontact

Scanning

SEMI MF1391 — Standard Test Method for

Substitutional Atomic Carbon Content of Silicon by

Infrared Absorption

SEMI MF1392 — Test Method for Determining Net

Carrier Density Profiles in Silicon Wafers by

Capacitance-Voltage Measurements with a Mercury

Probe