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SEMI P23-0200 © SEMI 1993 , 2000 2 5.3 T here are two types of patterns : W iring and Contact Hole pattern. 5.4 In one mask, t here will be one t yp e of pattern, either Wiring or Con tact Hole. 5.5 On e d efect chip wil…
SEMI P23-0200 © SEMI 1993, 20001
SEMI P23-0200
GUIDELINES FOR PROGRAMMED DEFECT MASKS AND
BENCHMARK PROCEDURES FOR SENSITIVITY ANALYSIS OF MASK
DEFECT INSPECTION SYSTEMS
These guidelines were technically approved by the Global Mask and Mask Equipment Committee and are the
direct responsibility of the Japanese Mask and Mask Equipment Committee. Current edition approved by the
Japanese Regional Standards Committee on September 10, 1999. Initially available at www.semi.org
February 2000; to be published February 2000. Originally published in 1993; previously published in 1996.
NOTE: These guidelines were rewritten in their entirety
in February 2000.
1 Purpose
1.1 The purpose of this guideline is to propose a test
mask to be used for evaluation of the sensitivity of
Mask Defect Inspection Systems. This test mask
consists of test chips including programmed pattern
defects and reference test chips without programmed
defects. Since the test chip is an assembly of cells, the
test chips are defined in this guideline by cell patterns,
programmed defects in cell patterns, and the layout of
the cells. Also, the test mask is defined by defining the
test chips arrangement. Furthermore, the use of this
mask is described. It is desirable that these test masks
and benchmark procedures be used when the sensitivity
of a Mask Defect Inspection System is evaluated.
1.2 Background — Different masks have been used by
many equipment manufacturers and users in the past,
and sensitivity has been tested by various methods
decided independently by each manufacturer and user.
In some cases, no common measurement methods or
sensitivity analysis methods have been agreed upon.
Therefore, confusion exists concerning the sensitivity
comparison of equipment between manufacturers, the
definition for specifications between users and
suppliers, and the definition for specifications between
users. Also, due to the fact that several problems were
found when using the previous guideline in actual
manufacturing, the document has been reviewed and
content has been changed throughout. It was also the
goal of this revision, while considering ease of
manufacturing of test masks first, to fully cover the
evaluation of mask defect inspection systems.
2 Scope
2.1 This guideline defines the content and methods for
use of test masks used in the evaluation of mask defect
inspection systems. Although it is possible to use this
test mask to evaluate transcription of defects etc., this
standard does not attempt to define these processes.
2.2 This guideline shall be revised when a new
effective measurement technology for defect sizing
becomes commonly available in the market.
2.3 This guideline does not purport to address safety
issues, if any, associated with its use. It is the
responsibility of the users of this guideline to establish
appropriate safety and health practices and determine
the applicability of regulatory limitations prior to use.
3 Referenced Standards
3.1 SEMI Standards
SEMI P1 Specification for Hard Surface Photomask
Substrates
SEMI P22 Guideline for Photomask Defect
Classification and Size Definition.
SEMI P33 Provisional Specification for
Developmental 230 mm Square Hard Surface
Photomask Substrates
NOTE 1: As listed or revised, all documents cited shall be the
latest publications of adopted standards.
4 Terminology
4.1 Definitions
4.1.1 Many terms relating to photomask technology
are defined in SEMI P22 and SEMI P33.
4.1.2 design pattern pattern of intended design
data.
4.1.3 photomask pattern pattern on photomask
surface.
5 Mask (See Figure 1)
5.1 Masks will be either 5" or 6" which meet SEMI
P1; both the 5" and 6" will be the same layout.
5.2 Masks will be limited to two types, namely
Conventional and Attenuated (Half Tone). Note that
Levenson and Optical Proximity Correction (OPC)
types will not be included.
SEMI P23-0200 © SEMI 1993, 2000 2
5.3 There are two types of patterns: Wiring and
Contact Hole pattern.
5.4 In one mask, there will be one type of pattern,
either Wiring or Contact Hole.
5.5 One defect chip will be placed in the center of the
mask.
5.6 Eight reference chips (non-defective) will be
placed at 25,000 micron intervals to make sure that
inspection can occur even if the mask is set in the
inspection equipment in different directions (e.g., 0º,
90º, 180º, 270º).
5.7 Mask Naming
5.7.1 Wiring Pattern Mask is “SEMI STANDARD
P23-0200-1500W”.
5.7.2 Contact Hole Pattern Mask is ”SEMI
STANDARD P23-0200-1500C”.
5.7.3 “P23-0200” is the registered number of this
guideline.
5.7.4 “1500” expressed in nanometers, is the
photomask pattern design rule. The following
explanations in this guideline are based on a 1,500 nm
(1.50 micron) design rule.
5.7.5 The mask naming should be written in characters
which can be confirmed by the naked eye, and should
be displayed in a place recognized by either the
manufacturer or user of the mask.
5.8 Four light intensity adjustment patterns will be
placed at 12,500 micron intervals from the center of the
mask.
5.9 It is feasible to place stepper alignment marks and
other patterns in such a way as not to effect the mask
pattern described above.
6 Chip
See Figure 2 for illustration.
6.1 One chip of wiring patterns will be made up of 17
types of defects, each at 20 different defect sizes for a
total of 340 cells.
6.2 One chip of contact hole patterns will be made up
of 14 types of defects, each at 20 different defect sizes
for a total of 280 cells.
6.3 Place defects changing types along the X-axis.
6.3.1 Display the defect type from the left side of the
chip, toward the right, in capital English letters.
6.3.1.1 Wiring patterns are listed from A to Q.
6.3.1.2 Contact Hole patters are listed from A to N.
6.4 Place defects changing size along the Y-axis.
6.4.1 Place the defects, from top to bottom, in range of
size from 0.05 microns to 1.00 microns at 0.05 micron
intervals.
NOTE 2: Display all sizes as they pertain to the mask (on the
mask).
7 Cell
7.1 One cell will be 250 microns square. (See Figure
3.)
7.2 Sub-cells will be placed 5 by 5 (Total=25).
7.3 Defects will be placed in the center of the cell (±
5.0 micron).
7.4 Cells will be broken up into 9 types, depending on
the content of the pattern and defect.
7.4.1 Seven types are used for Wiring Patterns. (See
Figures 4, 15 to 21.)
7.4.2 Two types are used for Contact Hole Patterns.
(See Figures 6 and 7.)
8 Sub-cell
8.1 One sub-cell is 50 microns square.
8.2 Place a pattern which shows the boundaries of the
cell at the sub-cell coordinates (x1,y1), (x5,y1), (x1,y5)
and (x5,y5). (See Figures 8 to 12.)
8.2.1 Figure 13 shows an example of these patterns
placed together.
8.2.2 The pattern placed at (x5,y1) should be a pattern
from which coordinates can be measured.
8.3 Place the defect type ID (cell coordinates) and the
abbreviated pattern for the defect type in sub-cell
coordinates (x1,y5). (See Figures 8 and 12.)
8.3.1 Defect type ID (cell coordinates) are written as
one capital English letter, representing the defect type
and a two-digit number representing defect size.
(Example: A01)
Character line width is set at 2.00 micron. (See Figure
14.)
8.3.2 The abbreviated pattern which denotes the defect
content should keep the defect shape and direction
consistent with the shape and direction of the program
defect in the design.
8.4 The recommended values for pattern dimensions
under the design rule (dimensions on mask) are as
follows:
SEMI P23-0200 © SEMI 1993, 20003
Dimension on Mask Mask Name
5.00 micron 5000
3.00 micron 3000
2.50 micron 2500
2.00 micron 2000
1.50 micron 1500
1.00 micron 1000
0.80 micron 800
0.50 micron 500
8.4.1 The above list of design rule dimensions are
recommended values, and it is feasible to use a different
size.
8.4.2 When changing the design rule, chip spacing
(25.0 mm) should not change.
8.5 For the Wiring Pattern Chip, place a pattern with
uniform sub-cell coordinates: (x2,y1), (x4,y1), (x1,y2),
(x2,y2), (x4,y2), (x5,y2), (x1,y4), (x2,y4), (x4,y4),
(x5,y4), (x2,y5), (x4,y5). (See Figure 4.)
8.5.1 Patterns in a sub-cell using the uniform Wiring
Pattern should be as follows:
Sub-cell Coordinates Pattern to Be Used
(x2,y1) & (x4,y5) Wiring Type A (Figure 15)
(x4,y1) & (x2,y5) Wiring Type B (Figure 16)
(x1,y4) & (x5,y2) Wiring Type A rotated 90º
(x1,y2) & (x5,y4) Wiring Type B rotated 90º
(x2,y2) Wiring Type C (Figure 17)
(x4,y2) Wiring Type D (Figure 18)
(x2,y4) Wiring Type E (Figure 19)
(x4,y4) Wiring Type F (Figure 20)
8.5.2 Uniform patterns are placed inside a 50 micron-
square sub-cell.
8.5.3 For patterns in the Wiring Pattern which change
depending on the defect type ID, the same patterns
should be placed, without borders, in sub-cell
coordinates (x3,y1), (x3,y2), (x1,y3), (x2,y3), (x3,y3),
(x4,y3), (x5,y3), (x3,y4) and (x3,y5).
8.5.4 Pattern content will change as follows,
depending on the defect type ID:
Defect Type ID Pattern to Be Used
A, B, C, D Wiring Type A (Figure 15)
G, H, K, L, Q Wiring Type C (Figure 17)
I, J Wiring Type D (Figure 18)
E, F Wiring Type E (Figure 19)
M, N Wiring Type F (Figure 20)
O, P Wiring Type G (Figure 21)
8.5.4.1 Adjust the pattern position so that the defect is
placed in the center of sub-cell coordinates (x3,y3).
There may be instances where the placement of the
uniform patterns and the defect-inserted patterns vary
slightly.
8.5.4.2 Figure 5 is an example of placement of a Type
A Wiring Pattern.
8.6 For Contact Hole Pattern Chips, contact hole
patterns should be placed at all sub-cells except
coordinates (x1,y1), (x5,y1), (x1,y5) and (x5,y5). (See
Figures 6 and 22.)
8.6.1 For misplacement defects, in order to be
evaluated as an isolated field, place just one contact
hole pattern in the center of sub-cell coordinates (x3,
y3) and only in cells where the contact hole pattern
defect type ID is “M”. (See Figure 7.)
8.6.2 Adjust the whole pattern for contact hole
patterns so that the defect is placed in the center of sub-
cell coordinates (x3,y3).
8.7 Use a common spacing for placement of wiring
patterns and contact hole patterns.
8.7.1 For placement of patterns in design rule 1.50
microns (on mask), use a spacing of 14.0 microns in the
X-direction and 7.0 microns in the Y-direction.
8.7.2 The values for spacing should change
accordingly with a change in the design rule.
9 Defect
See Figures 23 and 24 for illustration.
9.1 Defect Type
9.1.1 Dot
9.1.2 Hole
9.1.3 Edge Extension
0 degree
45 degree
arctan (1/2) = 26.565 degree
9.1.4 Edge Intrusion
0 degree
45 degree
arctan (1/2) = 26.565 degree
9.1.5 Corner Extension
9.1.6 Corner Intrusion
9.1.7 Over size
9.1.8 Under size
9.1.9 Elongation
9.1.10 Truncation
9.1.11 Misplacement