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SEMI F47-0200 © SEMI 199 9, 2000 3 8 Test Methods 8.1 Qualificatio n tes t s are conduct e d o n samples of production articles, n ot each ite m produced. Qualification testing of equipme nt to requirements i n this spec…

SEMI F47-0200 © SEMI 1999, 2000 2
other related standards.
3.4 This standard is intended to be a performance
specification, it is not intended to address design issues
related to safety which are covered elsewhere in the
SEMI Standards (see SEMI S2).
NOTE 1: Safety related systems may require ride-through
capability for conditions up to and including full power
failure. Further, if hazards could result from voltage sags
greater than those allowable in Table 1, provisions should be
made to negate or eliminate such hazards.
3.5 International, national and local codes, regulations
and laws should be consulted to ensure that the equip-
ment meets regulatory requirements in each location.
4 Referenced Standards
4.1 SEMI Standards
SEMI E10 — Standard for Definition and Measurement
of Equipment Reliability, Availability, and
Maintainability (RAM)
SEMI E51 — Guide for Typical Facilities Services and
Termination Matrix
SEMI F42 — Test Method for Semiconductor
Processing Equipment Voltage Sag Immunity
SEMI S2 — Environmental, Health, and Safety
Guideline for Semiconductor Manufacturing Equipment
4.2 IEEE Standards
1
IEEE 446 — IEEE Recommended Practice for
Emergency and Standby Power Systems for Industrial
and Commercial Applications (IEEE Orange Book)
IEEE 1100 — IEEE Recommended Practice for
Powering and Grounding Sensitive Electronic
Equipment (IEEE Emerald Book)
IEEE 1250 — IEEE Guide for Service to Equipment
Sensitive to Momentary Voltage Disturbances
NOTE 2: As listed or revised, all documents cited shall be the
latest publications of adopted standards.
5 Terminology
5.1 assist — an unplanned interruption that occurs
during an equipment cycle where all three of the
following conditions apply:
• The interrupted equipment cycle is resumed
through external intervention (e.g., by an operator
or user, either human or host computer).
• There is no replacement of a part, other than
specified consumables.
1 The Institute of Electrical and Electronic Engineers, Inc., 345 East
47th Street, New York, NY 10017-2394, USA
• There is no further variation from specification of
equipment operation [SEMI E10].
5.2 failure — any unplanned interruption or variance
from the specifications of equipment operation other
than assists [SEMI E10].
5.3 interrupt — any assist or failure [SEMI E10].
5.4 ride-through capability — the ability of equipment
to withstand momentary interruptions or sags [IEEE
1250]. Also known as voltage sag immunity.
5.5 voltage sag — an rms reduction in the ac voltage
at power frequency for durations from half-cycle to a
few seconds [IEEE 1250]. Also known as voltage dip.
6 Ordering Information
6.1 Semiconductor manufacturers may use this
standard when procuring processing equipment to
specify equipment ride-through requirements capability
to the equipment supplier. This document may also be
used by semiconductor processing equipment suppliers
to specify ride-through requirements to component and
module suppliers.
6.2 Orders for equipment in accordance with this
standard shall include:
a) This specification number and date of issue.
b) Requirements for qualification testing per SEMI
F42.
c) Any certification showing passage of qualification
tests required to be provided (optional).
d) Any test results required to be included in reports
to be provided (optional).
7 Requirements
7.1 Semiconductor processing, metrology, and
automated test equipment must be designed and built to
conform to the voltage sag ride-through capability
shown in Figure 1. Equipment must continue to operate
without interrupt (see Terminology) during conditions
identified in the area above the defined line.
7.2 The requirements defined in this specification
apply to two phase (phase-to-phase) and single phase
(phase-to-neutral) voltage incidents.
7.3 The performance curve is defi ned by values shown
in Table 1—voltage sag duration and percent deviation
from equipment nominal voltage.
NOTE 3: For recommendations on equipment ride-through
capability below 0.05 seconds (50 milliseconds) and above
1.0 seconds, see Related Information at the end of this
document.

SEMI F47-0200 © SEMI 1999, 20003
8 Test Methods
8.1 Qualification tests are conducted on samples of
production articles, not each item produced.
Qualification testing of equipment to requirements in
this specification should be performed per SEMI F42.
9 Related Documents
9.1 SEMI Standard
SEMI S9 — Electrical Test Methods for Semiconductor
Manufacturing Equipment
9.2 CENELEC Standard
2
EN 50082-2 — Electromagnetic Compatibility —
Generic Immunity Standard, Part 2: Industrial
Environments
9.3 IEC Standard
3
IEC 61000-4-11 — Electromagnetic Compatibility
(EMC) — Part 4: Testing and Measuring Techniques
— Section 11: Voltage Dips, Short Interruptions and
Voltage Variations Immunity Tests
9.4 IEEE Standard
1
IEEE 1346 — Electric Power System Compatibility
with Electronic Process Equipment
NOTE 4: As listed or revised, all documents cited shall be the
latest publications of adopted standards.
2 European Committee for Electrotechnical Standardization, Rue de
Stassart, 35, B – 1050, Brussels
3 International Electrotechnical Commission, 3, rue de Varembé, P.O.
Box 131, 1211 Geneva 20, Switzerland

SEMI F47-0200 © SEMI 1999, 2000 4
Table 1 Voltage Sag Duration and Percent Deviation from Equipment Nominal Voltage
VOLTAGE SAG DURATION VOLTAGE SAG
Seconds (s) Milliseconds (ms) Cycles at 60 hz Cycles at 50 hz
Percent (%) of
Equipment Nominal
Voltage
< 0.05 s < 50 ms < 3 cycles < 2.5 cycles Not specified
0.05 to 0.2 s 50 to 200 ms 3 to 12 cycles 2.5 to 10 cycles 50%
0.2 to 0.5 s 200 to 500 ms 12 to 30 cycles 10 to 25 cycles 70%
0.5 to 1.0 s 500 to 1000 ms 30 to 60 cycles 25 to 50 cycles 80%
> 1.0 s > 1000 ms > 60 cycles > 50 cycles Not specified
Percent of Equipment Nominal Voltage
0.2 0.50.1 1.0
0.05
Duration of Voltage Sag in Seconds
100
90
80
70
60
50
40
30
20
10
0
NOTE: Equipment must continue to operate without interrupt during voltage sags above the line.
Figure 1
Required Semiconductor Equipment Voltage Sag Ride-Through Capability Curve
NOTICE: SEMI makes no warranties or
representations as to the suitability of the standards set
forth herein for any particular application. The
determination of the suitability of the standard is solely
the responsibility of the user. Users are cautioned to
refer to manufacturer’s instructions, product labels,
product data sheets, and other relevant literature
respecting any materials mentioned herein. These
standards are subject to change without notice.
The user’s attention is called to the possibility that
compliance with this standard may require use of
copyrighted material or of an invention covered by
patent rights. By publication of this standard, SEMI
takes no position respecting the validity of any patent
rights or copyrights asserted in connection with any
item mentioned in this standard. Users of this standard
are expressly advised that determination of any such
patent rights or copyrights, and the risk of infringement
of such rights, are entirely their own responsibility.