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SEMI M51-0303 © SEMI 2002, 2003 9 11 Calculations 11.1 Current and Curre nt Density 11.1.1 To calculate the ox ide leakage current (I) fr om an oxide leakage cu rrent density (J), multiply the current density by the area…

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SEMI M51-0303 © SEMI 2002, 2003 8
care must be taken to avoid plasma damage on the
formed MOS capacitors.
10.1.14 Etch the backside oxide. Care must be taken to
prevent damage to MOS capacitors during the etching
process. For example, a coating resist on the front
surface can prevent the gate oxide from sustaining
damage in NH
4
F etching.
10.1.15 Remove the resist on the sample silicon
wafers. If a plasma ashing machine is used, attention
must be paid because some kinds of ashing machines
have been reported to damage MOS capacitors.
10.2 Measurement
10.2.1 Before the measurement, record the following
information for each sample: date, time, operator,
sample ID, oxide thickness, gate area, gate material,
oxidation condition, conductivity type (p or n),
equipment ID, and comments.
10.2.2 Decide on measurement parameters and record
them. Stepwise voltage is applied in this test method.
The parameters include maximum stress voltage (V
max
),
increment of step voltage (∆V), step hold time (T
h
),
judgment current of breakdown (I
bd
), measurement
temperature, the number of capacitors to be measured
and a map of the capacitors.
10.2.3 Set a tungsten exploring probe at the starting
position.
10.2.4 Set the exploring probe on a new MOS
capacitor at the next position.
10.2.5 Bias the applied voltage to zero volts
(V
app
(0) = 0). Record the oxide leakage current and the
voltage.
10.2.6 Increase the applied voltage by a step increment
(V
app
(n) = V
app
(n − 1) + ∆V). Measure the current I(n)
and the voltage at the step after the hold time (T
h
), and
record them, where “n” is the step number. At the first
step, V
app
(1) = V
app
(0) + ∆V
10.2.7 If the applied voltage is equal to or greater than
the maximum stress voltage (V
app
(n) ≥ V
max
), record the
maximum stress voltage (V
max
) as the breakdown
voltage (V
bd
) along with the MOS address, and proceed
to Section 10.2.9. If V
app
is less than V
max
, proceed to
next step.
10.2.8 Check to see if the current I(n) has reached the
judgment current of breakdown (I
bd
). If so, record the
applied voltage (V
app
), along with each MOS address,
as the breakdown voltage (V
bd
), and proceed to Section
10.2.9. If not, repeat from Section 10.2.6.
10.2.9 Check to see if there are any more MOS
capacitors to be measured. If so, repeat from Section
10.2.4 until all MOS capacitors have been tested.
10.2.10 Report the results.
10.2.11 The maximum stress electric field (E
max
),
increment of step field (∆E) and applied field (E
app
) can
also be used as measurement parameters. They can be
obtained by calculation as shown in Section 10.2.
10.2.12 Figure 2 is a flow diagram outlining the
procedure for this test method.
Record Sample ID
Determine Test Parameter
∆
V, V
max
, T
h
, I
bd
Probe New Capacitor
Set V
app
= 0
Increase V
app
(n)
( = V
app
(n-1) +
∆
V)
Measure I(n), V(n)
Wait T
h
V
app
(n) > V
max
I(n) > I
bd
Record MOS ID
& V
bd
= V
max
Record MOS ID
& V
bd
= V(n)
More Capacitors
on Wafer?
Report Result
Yes
No
No
Yes
Yes
No
Figure 2
Flow Diagram Outline
SEMI M51-0303 © SEMI 2002, 2003 9
11 Calculations
11.1 Current and Current Density
11.1.1 To calculate the oxide leakage current (I) from
an oxide leakage current density (J), multiply the
current density by the area of gate contact (S) as
follows:
Symbolically:
I = J × S (1)
Example: Given a current density (J) of 1 µA/cm
2
and a
gate area (S) of 10 mm
2
, the current would be 100 nA.
Similarly, compute current density (J, [A/cm
2
]) from
measured current (I, [A]) and area (S, [cm
2
]) using.
J = I / S [A/cm
2
] (2)
11.2 Voltage and Electric Field Strength
11.2.1 To calculate voltage (V) from an electric field
(E), multiply the electric field strength by the gate oxide
thickness (T
ox
) as follows:
Symbolically:
V = E × T
ox
(3)
where:
T
ox
= Gate oxide thickness, cm
Example: Given an electric field (E) of 15 MV/cm and
a gate oxide thickness (T
ox)
of 25 nm, the voltage would
be 37.5 V.
Similarly, compute electric field (E, [MV/cm]) from
measured voltage (V, [V]) and gate oxide thickness
(T
ox
, [cm]) using.
E = V / T
ox
[MV/cm] (4)
11.3 Oxide Voltage
11.3.1 Neglect the flatband voltage shift. The flatband
voltage shift is due to gate-substrate work function
difference [Φ
ms
] and oxide fixed charge [Q
f
]. Although
it is better to consider this flatband voltage shift, its
influence on the oxide film thickness in the range
recommended is small.
11.4 Calculation of Defect Density
11.4.1 Calculate the defect density using the following
equation based on the Poisson distribution assumption
of the dielectric breakdown defects (see Standard
EIA/JEDEC 35):
ρ
ox
= -ln(1-F)/S (5)
where:
ρ
ox
= Defect density (defects/cm
2
)
F = Failure fraction for each oxide breakdown mode
S = Capacitor gate area (cm
2
)
Example: Given a total of 100 MOS capacitors tested,
with 30 B-mode-failed capacitors and a gate area of 10
mm
2
, the defect density would be as follows:
ρ
ox
= -ln(1-(30/100))/0.1 = 3.6 defects/cm
2
(6)
11.5 Weibull Distribution
11.5.1 To convert cumulative percent to Weibull
format (sometimes referred to as “smallest extreme
value probability distribution III”), use the following
equation:
ln(-ln(1-F)) (7)
where ln is the natural log operator and F is a percent of
the cumulative failures. Care shall be taken so that F is
never exactly 1 since this will be in an undefined
situation.
12 Report
12.1 Report the following for each wafer, as
appropriate for the test conditions and as agreed upon
by the parties to the test.
12.2 Test Description
12.2.1 Date
12.2.2 Time
12.2.3 Operator
12.2.4 Measurement system ID
12.2.5 Sample lot ID
12.2.6 Wafer ID
12.2.7 Average oxide thickness
12.2.8 Gate area (cm
2
)
12.2.9 Gate material
12.2.10 Oxidation parameters
12.2.11 Type of wafer (Ex: n or p)
12.2.12 Applied stress parameters
12.2.13 Test temperature
12.2.14 Process comment
12.3 Report the following for each capacitor.
12.3.1 Capacitor ID such as address
12.3.2 I–V character data
12.3.3 Breakdown voltage or Breakdown electric field
12.4 Report the following for each wafer.
SEMI M51-0303 © SEMI 2002, 2003 10
12.4.1 Histogram and Weibull plot of breakdown
electric field
12.4.2 Average of breakdown voltage, breakdown
electric field
12.4.3 Breakdown mode yield (A-mode, B-mode and
C-mode)
12.4.4 Breakdown mode map or E
bd
map
12.4.5 Result of calculated defect density
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